SLUS557G March 2003 – December 2016 UC28023 , UC28025
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
The UC28023 and UC28025 (UC2802x) are fixed-frequency PWM controllers optimized for high-frequency switched-mode power-supply applications. Targeted for cost-effective solutions with minimal external components. UC2802x devices include an oscillator, a temperature-compensated reference, a wide band width error amplifier, a high-speed current-sense comparator, and high-current active-high totem-pole outputs to directly drive external MOSFETs.
Protection circuitry includes a current limit comparator with a 1-V threshold, a TTL compatible shutdown port, and a soft-start pin which doubles as a maximum duty cycle clamp. The logic is fully latched to provide jitter free operation and prohibit multiple pulses at an output. An undervoltage lockout section with 800 mV of hysteresis assures low start-up current. During undervoltage lockout, the outputs are high impedance. Propagation delays through the comparators and logic circuitry have been minimized while maximizing bandwidth and slew rate of the error amplifier.
Figure 11 shows a simplified schematic of the UC2802x error amplifier and Figure 2 and Figure 3 show its characteristics.
Figure 12 shows a generalized synchronization. Figure 13 shows a synchronized operation of two units in close proximity.
The circuit for the UC28023 shown in Figure 14 describes achievement a constant volt-second product clamp over varying input voltages. The ramp generator components, RT and CR are chosen so that the ramp at Pin 9 (ILIM/SD) crosses the 1-V threshold at the same time the desired maximum volt-second product is reached. The delay through the functional inverter block must be such that the ramp capacitor can be completely discharged during the minimum deadtime.
The circuit for the UC28025 shown in Figure 15 describes achievement a constant volt-second product clamp over varying input voltages. The ramp generator components, RT and CR are chosen so that the ramp at Pin 9 (ILIM/SD) crosses the 1-V threshold at the same time the desired maximum volt-second product is reached. The delay through the functional inverter block must be such that the ramp capacitor can be completely discharged during the minimum deadtime.
UC28023 has one output and UC28025 has dual alternating outputs.
The following test fixture is useful for exercising many of the UC28025’s functions and measuring their specifications. As with any wideband circuit, careful ground and bypass procedures must be followed. TI highly recommends using a ground plane
There are no functional modes for this device.