SLUSF14 august   2023 UCC15241-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Safety Limiting Values
  9. 8 Safety-Related Certifications
  10. 9 Insulation Characteristics
  11. 10Typical Characteristics
  12. 11Detailed Description
    1. 11.1 Overview
    2. 11.2 Functional Block Diagram
    3. 11.3 Feature Description
      1. 11.3.1 Power Stage Operation
        1. 11.3.1.1 VDD-VEE Voltage Regulation
        2. 11.3.1.2 COM-VEE Voltage Regulation
        3. 11.3.1.3 Power Handling Capability
      2. 11.3.2 Output Voltage Soft Start
      3. 11.3.3 ENA and PG
      4. 11.3.4 Protection Functions
        1. 11.3.4.1 Input Undervoltage Lockout
        2. 11.3.4.2 Input Overvoltage Lockout
        3. 11.3.4.3 Output Undervoltage Protection
        4. 11.3.4.4 Output Overvoltage Protection
        5. 11.3.4.5 Overpower Protection
        6. 11.3.4.6 Overtemperature Protection
    4. 11.4 Device Functional Modes
  13. 12Application and Implementation
    1. 12.1 Application Information
    2. 12.2 Typical Application
      1. 12.2.1 Design Requirements
      2. 12.2.2 Detailed Design Procedure
        1. 12.2.2.1 Capacitor Selection
        2. 12.2.2.2 Single RLIM Resistor Selection
        3. 12.2.2.3 RDR Circuit Component Selection
        4. 12.2.2.4 Feedback Resistors Selection
      3. 12.2.3 Application Curves
    3. 12.3 System Examples
    4. 12.4 Power Supply Recommendations
    5. 12.5 Layout
      1. 12.5.1 Layout Guidelines
      2. 12.5.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  15. 14Mechanical, Packaging, and Orderable Information
  16. 15Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11.3.1 Power Stage Operation

The UCC15241-Q1 module uses an active full-bridge inverter on the primary-side and a passive full-bridge rectifier on the secondary-side. The small integrated transformer has a relatively high carrier frequency to reduce the size for integrating into the 36-pin SSOP package. The power stage carrier frequency operates within 10 MHz to 16 MHz. The power stage carrier frequency is determined by input voltage with a feed-forward control: when VVIN is 21 V, the frequency is 16 MHz; when VVIN is 27 V, the frequency is 10 MHz; when VVIN is between 21 V and 27 V, the frequency reduces gradually from 16 MHz to 10 MHz as VVIN voltage rises. Spread spectrum modulation, SSM, is used to reduce emissions. ZVS operation is maintained to reduce switching power losses.

The UCC15241-Q1 module creates two regulated outputs. It can be configured as a single output converter, VDD to VEE only, or a dual-output converter, VDD to VEE and COM to VEE. Even though the module uses VEE as the reference point to create two positive output voltages, the outputs can use COM as the reference point and become a positive and a negative output.

These two outputs are controlled independently through hysteresis control. Furthermore, the VDD-VEE is the main output, and COM to VEE uses the main output as its input to created a second regulated output voltage.