SLUSDU7A March   2020  – August 2024 UCC21320-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings (Automotive)
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety Limiting Values
    8. 5.8  Electrical Characteristics
    9. 5.9  Timing Requirements
    10. 5.10 Switching Characteristics
    11. 5.11 Insulation Characteristics Curves
    12. 5.12 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 Propagation Delay and Pulse Width Distortion
    2. 6.2 Rising and Falling Time
    3. 6.3 Input and Disable Response Time
    4. 6.4 Programable Dead Time
    5. 6.5 Power-up UVLO Delay to OUTPUT
    6. 6.6 CMTI Testing
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD, VCCI, and Under Voltage Lock Out (UVLO)
      2. 7.3.2 Input and Output Logic Table
      3. 7.3.3 Input Stage
      4. 7.3.4 Output Stage
      5. 7.3.5 Diode Structure in the UCC21320 -Q1
    4. 7.4 Device Functional Modes
      1. 7.4.1 Disable Pin
      2. 7.4.2 Programmable Dead Time (DT) Pin
        1. 7.4.2.1 Tying the DT Pin to VCC
        2. 7.4.2.2 DT Pin Connected to a Programming Resistor between DT and GND Pins
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Designing INA/INB Input Filter
        2. 8.2.2.2 Select External Bootstrap Diode and its Series Resistor
        3. 8.2.2.3 Gate Driver Output Resistor
        4. 8.2.2.4 Gate to Source Resistor Selection
        5. 8.2.2.5 Estimate Gate Driver Power Loss
        6. 8.2.2.6 Estimating Junction Temperature
        7. 8.2.2.7 Selecting VCCI, VDDA/B Capacitor
          1. 8.2.2.7.1 Selecting a VCCI Capacitor
          2. 8.2.2.7.2 Selecting a VDDA (Bootstrap) Capacitor
          3. 8.2.2.7.3 Select a VDDB Capacitor
        8. 8.2.2.8 Dead Time Setting Guidelines
        9. 8.2.2.9 Application Circuits with Output Stage Negative Bias
      3. 8.2.3 Application Curves
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DWK|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

VDDA = VDDB= 15 V, VCCI = 3.3 V, TA = 25°C, No load unless otherwise noted.

UCC21320-Q1 Per
                        Channel Current Consumption vs. Frequency (No Load, VDD =
                        15
                        V or 25 V)
Figure 5-4 Per Channel Current Consumption vs. Frequency (No Load, VDD = 15 V or 25 V)
UCC21320-Q1 Per
                        Channel Current Consumption (IVDDA/B) vs. Frequency (10-nF Load,
                        VDD =
                        15
                        V or 25 V)
Figure 5-6 Per Channel Current Consumption (IVDDA/B) vs. Frequency (10-nF Load, VDD = 15 V or 25 V)
UCC21320-Q1 Per
                        Channel (IVDDA/B) Quiescent Supply Current vs Temperature (No
                        Load, Input Low, No Switching)
Figure 5-8 Per Channel (IVDDA/B) Quiescent Supply Current vs Temperature (No Load, Input Low, No Switching)
UCC21320-Q1 Rising and Falling Times vs.
                        Load
Figure 5-10 Rising and Falling Times vs. Load
UCC21320-Q1 Propagation Delay vs. Temperature
Figure 5-12 Propagation Delay vs. Temperature
UCC21320-Q1 Pulse
                        Width Distortion vs. Temperature
Figure 5-14 Pulse Width Distortion vs. Temperature
UCC21320-Q1 Propagation Delay Matching (tDM) vs. Temperature
Figure 5-16 Propagation Delay Matching (tDM) vs. Temperature
UCC21320-Q1 VDD
                            8-V UVLO Threshold vs. Temperature
Figure 5-18 VDD 8-V UVLO Threshold vs. Temperature
UCC21320-Q1 IN/DIS Low Threshold
Figure 5-20 IN/DIS Low Threshold
UCC21320-Q1 Dead
                        Time vs. Temperature (with RDT = 20 kΩ and 100 kΩ)
Figure 5-22 Dead Time vs. Temperature (with RDT = 20 kΩ and 100 kΩ)
UCC21320-Q1 Per
                        Channel Current Consumption (IVDDA/B) vs. Frequency (1-nF Load,
                        VDD =
                        15
                        V or 25 V)
Figure 5-5 Per Channel Current Consumption (IVDDA/B) vs. Frequency (1-nF Load, VDD = 15 V or 25 V)
UCC21320-Q1 Per
                        Channel (IVDDA/B) Supply Current Vs. Temperature (No Load,
                        Different Switching Frequencies)
Figure 5-7 Per Channel (IVDDA/B) Supply Current Vs. Temperature (No Load, Different Switching Frequencies)
UCC21320-Q1 IVCCI Quiescent Supply Current vs Temperature (No Load,
                        Input Low, No Switching)
Figure 5-9 IVCCI Quiescent Supply Current vs Temperature (No Load, Input Low, No Switching)
UCC21320-Q1 Output Resistance vs. Temperature
Figure 5-11 Output Resistance vs. Temperature
UCC21320-Q1 Propagation Delay vs. VCCI
Figure 5-13 Propagation Delay vs. VCCI
UCC21320-Q1 Propagation Delay Matching (tDM) vs. VDD
Figure 5-15 Propagation Delay Matching (tDM) vs. VDD
UCC21320-Q1 VDD
                            8-V UVLO Hysteresis vs. Temperature
Figure 5-17 VDD 8-V UVLO Hysteresis vs. Temperature
UCC21320-Q1 IN/DIS Hysteresis vs. Temperature
Figure 5-19 IN/DIS Hysteresis vs. Temperature
UCC21320-Q1 IN/DIS High Threshold
Figure 5-21 IN/DIS High Threshold
UCC21320-Q1 Dead
                        Time Matching vs. Temperature (with RDT = 20 kΩ and 100
                        kΩ)
Figure 5-23 Dead Time Matching vs. Temperature (with RDT = 20 kΩ and 100 kΩ)