SLUSEW9D May   2023  – June 2024 UCC21551

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety Limiting Values
    8. 5.8  Electrical Characteristics
    9. 5.9  Switching Characteristics
    10. 5.10 Insulation Characteristics Curves
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Propagation Delay and Pulse Width Distortion
    2. 6.2 Rising and Falling Time
    3. 6.3 Input and Enable Response Time
    4. 6.4 Programmable Dead Time
    5. 6.5 Power-up UVLO Delay to OUTPUT
    6. 6.6 CMTI Testing
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD, VCCI, and Undervoltage Lock Out (UVLO)
      2. 7.3.2 Input and Output Logic Table
      3. 7.3.3 Input Stage
      4. 7.3.4 Output Stage
      5. 7.3.5 Diode Structure in the UCC21551x
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable Pin
      2. 7.4.2 Programmable Dead-Time (DT) Pin
        1. 7.4.2.1 Tying the DT Pin to VCC
        2. 7.4.2.2 DT Pin Connected to a Programming Resistor Between DT and GND Pins
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Designing INA/INB Input Filter
        2. 8.2.2.2 Select External Bootstrap Diode and its Series Resistor
        3. 8.2.2.3 Gate Driver Output Resistor
        4. 8.2.2.4 Gate to Source Resistor Selection
        5. 8.2.2.5 Estimate Gate Driver Power Loss
        6. 8.2.2.6 Estimating Junction Temperature
        7. 8.2.2.7 Selecting VCCI, VDDA/B Capacitor
          1. 8.2.2.7.1 Selecting a VCCI Capacitor
          2. 8.2.2.7.2 Selecting a VDDA (Bootstrap) Capacitor
          3. 8.2.2.7.3 Select a VDDB Capacitor
        8. 8.2.2.8 Dead Time Setting Guidelines
        9. 8.2.2.9 Application Circuits with Output Stage Negative Bias
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Certifications
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Support Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DWK|14
  • DW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Safety Limiting Values

PARAMETER TEST CONDITIONS SIDE MIN TYP MAX UNIT
DW package
IS Safety output supply current RθJA = 74.1°C/W, VDDA/B = 15 V, TJ = 150°C, TA = 25°C DRIVER A, DRIVER B 58 mA
RθJA = 74.1°C/W, VDDA/B = 25 V, TJ = 150°C, TA = 25°C 34
PS Safety supply power RθJA = 74.1°C/W, TJ = 150°C, TA = 25°C INPUT 50 mW
DRIVER A 870
DRIVER B 870
TOTAL 1790
TS Maximum safety temperature(1) 150 °C
DWK package
IS Safety output supply current RθJA = 74.1°C/W, VDDA/B = 15 V, TJ = 150°C, TA = 25°C DRIVER A, DRIVER B 53 mA
RθJA = 74.1°C/W, VDDA/B = 25 V, TJ = 150°C, TA = 25°C 32 mA
PS Safety supply power RθJA = 74.1°C/W, TJ = 150°C, TA = 25°C INPUT 50 mW
DRIVER A 800 mW
DRIVER B 800 mW
TOTAL 1650 mW
TS Maximum safety temperature(1) 150 °C
(1) The maximum safety temperature, TS, has the same value as the maximum junction temperature, TJ , specified for the device. The IS and PS parameters represent the safety current and safety power respectively. The maximum limits of IS and PS should not be exceeded. These limits vary with the ambient temperature, TA. The junction-to-air thermal resistance, RqJA, in the Thermal Information table is that of a device installed on a high-K test board for leaded surface-mount packages. Use these equations to calculate the value for each parameter: TJ = TA + RqJA ´ P, where P is the power dissipated in the device. TJ(max) = TS = TA + RqJA ´ PS, where TJ(max) is the maximum allowed junction temperature. PS = IS ´ VI , where VI is the maximum supply voltage.