SLUSEK4B April   2022  – June 2024 UCC21717-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety Limiting Values
    8. 5.8  Electrical Characteristics
    9. 5.9  Switching Characteristics
    10. 5.10 Insulation Characteristics Curves
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Propagation Delay
      1. 6.1.1 Non-Inverting and Inverting Propagation Delay
    2. 6.2 Input Deglitch Filter
    3. 6.3 Active Miller Clamp
      1. 6.3.1 Internal Active Miller Clamp
    4. 6.4 Undervoltage Lockout (UVLO)
      1. 6.4.1 VCC UVLO
      2. 6.4.2 VDD UVLO
    5. 6.5 Overcurrent (OC) Protection
      1. 6.5.1 OC Protection with Soft Turn-OFF
    6. 6.6 Soft Turn-Off Triggered by RST/EN
      1. 6.6.1 Soft Turn-Off Triggered by RST/EN
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply
      2. 7.3.2  Driver Stage
      3. 7.3.3  VCC and VDD Undervoltage Lockout (UVLO)
      4. 7.3.4  Active Pulldown
      5. 7.3.5  Short Circuit Clamping
      6. 7.3.6  Internal Active Miller Clamp
      7. 7.3.7  Overcurrent and Short Circuit Protection
      8. 7.3.8  Soft Turn-Off
      9. 7.3.9  Fault (FLT), Reset and Enable (RST/EN)
      10. 7.3.10 Isolated Analog to PWM Signal Function
    4. 7.4 Device Functional Modes
  9. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Filters for IN+, IN-, and RST/EN
        2. 8.2.2.2 PWM Interlock of IN+ and IN-
        3. 8.2.2.3 FLT, RDY, and RST/EN Pin Circuitry
        4. 8.2.2.4 RST/EN Pin Control
        5. 8.2.2.5 Turn-On and Turn-Off Gate Resistors
        6. 8.2.2.6 Overcurrent and Short Circuit Protection
          1. 8.2.2.6.1 Protection Based on Power Modules with Integrated SenseFET
          2. 8.2.2.6.2 Protection Based on Desaturation Circuit
          3. 8.2.2.6.3 Protection Based on Shunt Resistor in Power Loop
        7. 8.2.2.7 Isolated Analog Signal Sensing
          1. 8.2.2.7.1 Isolated Temperature Sensing
          2. 8.2.2.7.2 Isolated DC Bus Voltage Sensing
        8. 8.2.2.8 Higher Output Current Using an External Current Buffer
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
8.2.2.7.2 Isolated DC Bus Voltage Sensing

The AIN to APWM channel may be used for other applications such as the DC-link voltage sensing, as shown in Figure 8-15. The same filtering requirements as given above may be used in this case, as well. The number of attenuation resistors, Ratten_1 through Ratten_n, is dependent on the voltage level and power rating of the resistor. The voltage is finally measured across RLV_DC to monitor the stepped-down voltage of the HV DC-link which must fall within the voltage range of AIN from 0.6 V to 4.5 V. The driver should be referenced to the same point as the measurement reference, thus in the case shown below the UCC21717-Q1 is driving the lower IGBT in the half bridge and the DC-link voltage measurement is referenced to COM. The internal current source IAIN should be taken into account when designing the resistor divider. The AIN pin voltage is:

Equation 13. UCC21717-Q1
UCC21717-Q1 DC-Link Voltage Sensing ConfigurationFigure 8-15 DC-Link Voltage Sensing Configuration