SLUSEM9A September 2022 – June 2024 UCC21755-Q1
PRODUCTION DATA
During short circuit condition, the Miller capacitance can cause a current sinking to the OUTH/OUTL/CLMPI pin due to the high dV/dt and boost the OUTH/OUTL/CLMPI voltage. The short circuit clamping feature of the device can clamp the OUTH/OUTL/CLMPI pin voltage to be slightly higher than VDD, which can protect the power semiconductors from a gate-source and gate-emitter overvoltage breakdown. This feature is realized by an internal diode from the OUTH/OUTL/CLMPI to VDD.