SLUSD49A September   2017  – January 2019 UCC256303

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Hybrid Hysteretic Control
      2. 7.3.2  Regulated 12-V Supply
      3. 7.3.3  Feedback Chain
      4. 7.3.4  Optocoupler Feedback Signal Input and Bias
      5. 7.3.5  System External Shut Down
      6. 7.3.6  Pick Lower Block and Soft Start Multiplexer
      7. 7.3.7  Pick Higher Block and Burst Mode Multiplexer
      8. 7.3.8  VCR Comparators
      9. 7.3.9  Resonant Capacitor Voltage Sensing
      10. 7.3.10 Resonant Current Sensing
      11. 7.3.11 Bulk Voltage Sensing
      12. 7.3.12 Output Voltage Sensing
      13. 7.3.13 High Voltage Gate Driver
      14. 7.3.14 Protections
        1. 7.3.14.1 ZCS Region Prevention
        2. 7.3.14.2 Over Current Protection (OCP)
        3. 7.3.14.3 Over Output Voltage Protection (VOUTOVP)
        4. 7.3.14.4 Over Input Voltage Protection (VINOVP)
        5. 7.3.14.5 Under Input Voltage Protection (VINUVP)
        6. 7.3.14.6 Boot UVLO
        7. 7.3.14.7 RVCC UVLO
        8. 7.3.14.8 Over Temperature Protection (OTP)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Burst Mode Control
      2. 7.4.2 Soft-Start and Burst-Mode Threshold
      3. 7.4.3 System States and Faults State Machine
      4. 7.4.4 Waveform Generator State Machine
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  LLC Power Stage Requirements
        2. 8.2.2.2  LLC Gain Range
        3. 8.2.2.3  Select Ln and Qe
        4. 8.2.2.4  Determine Equivalent Load Resistance
        5. 8.2.2.5  Determine Component Parameters for LLC Resonant Circuit
        6. 8.2.2.6  LLC Primary-Side Currents
        7. 8.2.2.7  LLC Secondary-Side Currents
        8. 8.2.2.8  LLC Transformer
        9. 8.2.2.9  LLC Resonant Inductor
        10. 8.2.2.10 LLC Resonant Capacitor
        11. 8.2.2.11 LLC Primary-Side MOSFETs
        12. 8.2.2.12 Design Considerations for Adaptive Dead-Time
        13. 8.2.2.13 LLC Rectifier Diodes
        14. 8.2.2.14 LLC Output Capacitors
        15. 8.2.2.15 BLK Pin Voltage Divider
        16. 8.2.2.16 BW Pin Voltage Divider
        17. 8.2.2.17 ISNS Pin Differentiator
        18. 8.2.2.18 VCR Pin Capacitor Divider
        19. 8.2.2.19 Burst Mode Programming
        20. 8.2.2.20 Soft-Start Capacitor
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 VCC Pin Capacitor
    2. 9.2 Boot Capacitor
    3. 9.3 RVCC Pin Capacitor
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support (if applicable)
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDB|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overview

The high level of integration of UCC256303 enables significant reduction in the list of materials and solution size without compromising functionality. UCC256303 achieves extremely low standby power using burst mode. The device's novel control scheme offers excellent transient performance and simplified compensation.

Many consumer applications with mid-high power consumption, including large screen televisions, AC-DC adapters, server power supplies, and LED drivers, employ PFC + LLC power supplies because they offer improved efficiency, and small size, compared with a PFC + Flyback topology. A disadvantage of the PFC + LLC power supply system is that it naturally offers poor light load efficiency and high no-load power because the LLC stage requires a minimum amount of circulating current to maintain regulation. UCC256303 LLC controller is designed to make a LLC power supply system with advanced control algorithm and high efficient burst mode. UCC256303 contains a number of novel features that enable it to offer excellent light load efficiency and no load power.

UCC256303 uses a novel control algorithm, Hybrid Hysteretic Control (HHC), to achieve regulation. In this control algorithm, the switching frequency is defined by the resonant capacitor voltage, which carries accurate input current information. Therefore, the control effort controls the input current directly. This enables excellent load and line transient response, and high efficient burst mode. In addition, comparing with traditional Direct Frequency Control (DFC), HHC changes the system to a first order system. Therefore, the compensation design is much easier and can achieve higher loop bandwidth.

UCC256303 includes robust algorithms for avoiding ZCS operation region. When near ZCS operation is detected, UCC256303 over-rides the feedback signal and ramps up the switching frequency until operation is restored. After which the switching frequency is ramped back down at a rate determined by the soft-start capacitor until control has been handed back to the voltage control loop.

UCC256303 monitors the half-bridge switched node to determine the required dead-time in the gate signals for the outgoing and incoming power switches. In this way the dead-time is automatically adjusted to provide optimum efficiency and security of operation. UCC256303 includes an algorithm for adaptive dead-time that makes its operation inherently robust compared with alternative parts.

UCC256303 includes high and low-side drivers that can directly drive LLC power stage delivering up to 1-kW peak/500-W continuous power. This allows complete and fully featured power systems to be realized with minimum component count.

At low output power levels UCC256303 automatically transitions into light-load burst mode. The LLC equivalent load current level during the burst on period is a programmable value. The space period between bursts is terminated by the secondary voltage regulator loop based on the FB pin voltage. During burst mode, the resonant capacitor voltage is monitored so that the first and last burst pulse widths are fully optimized for best efficiency. This method allows UCC256303 to achieve higher light-load efficiency and reduced no-load power compared with alternative parts.

In addition, UCC256303 enables the opto-coupler to operate at a low power mode, which can save up to 20 mW at standby mode comparing with conventional solution.

Additional protection features of UCC256303 include three-level over current protection, output over voltage protection, input voltage OVP and UVP, gate driver UVLO protection, and over temperature protection.

The key features of UCC256303 can be summarized as follows:

  • Integrated high voltage gate driver
  • Hybrid Hysteretic Control helps achieve best in class load and line transient response
  • Optimized light load burst mode enables 150-mW standby power design
  • Improved capacitive region operation prevention scheme
  • Adaptive dead time
  • Wide operating frequency range (35 kHz ~ 1 MHz)