SLUSDX3C
november 2020 – august 2023
UCC25800-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power Management
8.3.2
Oscillator
8.3.3
External Synchronization
8.3.4
Dead-Time
8.3.4.1
Adaptive Dead-time
8.3.4.2
Maximum Programmable Dead-time
8.3.5
Protections
8.3.5.1
Overcurrent Protection
8.3.5.1.1
OCP Threshold Setting
8.3.5.1.2
Output Power Capability
8.3.5.2
Input Overvoltage Protection (OVP)
8.3.5.3
Over-Temperature Protection (TSD)
8.3.5.4
Pin-Fault Protections
8.3.5.5
VREG Pin Protection
8.3.6
DIS/FLT Pin operation
8.3.6.1
FAULT Codes
8.4
Device Functional Modes
8.4.1
UVLO Mode
8.4.2
Soft-start Mode
8.4.3
Normal Operation Mode
8.4.4
Disabled Mode
8.4.5
Fault Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
LLC Converter Operation Principle
9.2.2
Design Requirements
9.2.3
Detailed Design Procedure
9.2.4
Application Curves
9.3
What to Do and What Not to Do
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DGN|8
MPDS046F
Thermal pad, mechanical data (Package|Pins)
DGN|8
PPTD362A
Orderable Information
slusdx3c_oa
slusdx3c_pm
7.6
Typical Characteristics
Figure 7-1
UVLO thresholds vs junction temperature
IC is set in test mode. The oscillator is enabled but the internal gate driver and power stage are disabled. V
VCC
= 15 V
Figure 7-3
VCC current vs junction temperature and switching frequency (Test mode, driver disabled)
V
VCC
= 15 V
Figure 7-5
VCC current vs junction temperature and switching frequency
Figure 7-7
R
DSON
vs junction temperature
V
VCC
= 15 V
Figure 7-9
Programmed maximum dead-time vs junction temperature
Figure 7-11
Maximum OCP1 threshold vs junction temperature
Figure 7-2
OVP thresholds vs junction temperature
IC is set in test mode. The oscillator is enabled but the internal gate driver and power stage are disabled. T
J
= 25
o
C
Figure 7-4
VCC current vs switching frequency and VCC voltage (Test mode, driver disabled)
T
J
= 25
o
C
Figure 7-6
VCC current vs switching frequency and VCC voltage
V
VCC
= 15 V
Figure 7-8
Switching frequency vs RT pin voltage and temperature
Figure 7-10
Maximum OCP2 thresholds vs junction temperature