SNVSAQ5B November   2018  – May 2022 UCC27282

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Start-up and UVLO
      3. 7.3.3 Input Stages and Interlock
      4. 7.3.4 Level Shifter
      5. 7.3.5 Output Stage
      6. 7.3.6 Negative Voltage Transients
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD Capacitor
        2. 8.2.2.2 Estimate Driver Power Losses
        3. 8.2.2.3 Selecting External Gate Resistor
        4. 8.2.2.4 Delays and Pulse Width
        5. 8.2.2.5 External Bootstrap Diode
        6. 8.2.2.6 VDD and Input Filter
        7. 8.2.2.7 Transient Protection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Enable

The device in DRC package has an enable (EN) pin. The outputs will be active only if the EN pin voltage is above the threshold voltage. Outputs will be held low if EN pin is left floating or pulled-down to ground. An internal 250 kΩ resistor connects EN pin to VSS pin. Thus, leaving the EN pin floating disables the device. Externally pulling EN pin to ground shall also disable the device. If the EN pin is not used, then it is recommended to connect it to VDD pin. If a pull-up resistor needs to be used then a strong pull-up resistor is recommended. For 12V supply voltage, a 10kΩ pull-up is suggested. In noise prone application, a small filter capacitor, 1nF, should be connected from the EN pin to VSS pin as close to the device as possible. An analog or a digital controller output pin could be connected to EN pin to enable or disable the device. Built-in hysteresis helps prevent any nuisance tripping or chattering of the outputs.