SLUSDU4A December 2020 – May 2022 UCC27289
PRODUCTION DATA
Most electronic devices and applications are becoming more and more power hungry. These applications are also reducing in overall size. One way to achieve both high power and low size is to improve the efficiency and distribute the power loss optimally. Most of these applications employ power MOSFETs and they are being switched at higher and higher frequencies. To operate power MOSFETs at high switching frequencies and to reduce associated switching losses, a powerful gate driver is employed between the PWM output of controller and the gates of the power semiconductor devices, such as power MOSFETs, IGBTs, SiC FETs, and GaN FETs. Many of these applications require proper UVLO protection so that power semiconductor devices are turned ON and OFF optimally. Also, gate drivers are indispensable when it is impossible for the PWM controller to directly drive the gates of the switching devices. With the advent of digital power, this situation is often encountered because the PWM signal from the digital controller is often a 3.3-V logic signal which cannot effectively turn on a power switch. A level-shift circuit is needed to boost the 3.3-V signal to the gate-drive voltage (such as 12 V or 5 V) in order to fully turn-on the power device, minimize conduction losses, and minimize the switching losses. Traditional buffer drive circuits based on NPN/PNP bipolar transistors in totem-pole arrangement prove inadequate with digital power because they lack level-shifting capability and under voltage lockout protection. Gate drivers effectively combine both the level-shifting and buffer-drive functions. Gate drivers also solve other problems such as minimizing the effect of high-frequency switching noise (by placing the high-current driver device physically close to the power switch), driving gate-drive transformers and controlling floating power device gates. This helps reduce power dissipation and thermal stress in controllers by moving gate charge power losses from the controller IC to the gate driver.
UCC27289 gate drivers offer high voltage (100 V), small delays (16 ns), and good driving capability (±3-A) in a single device. The floating high-side driver is capable of operating with switch node voltages up to 100 V. This allows for N-channel MOSFETs control in half-bridge, full-bridge, synchronous buck, synchronous boost, and active clamp topologies. UCC27289 gate driver IC has integrated bootstrap diode and therefore to generate high-side bias from the VDD voltage no external boot diode required in most applications. This allows users to optimize board layout and reduce bill of material costs. If external bootstrap diode is used then it should be fast recovery and low forward voltage drop Schottky diode. Each channel is controlled by its respective input pins (HI and LI), allowing flexibility to control ON and OFF state of the output.
Switching power devices such as MOSFETs have two main loss components; switching losses and conduction losses. Conduction loss is dominated by current through the device and ON resistance of the device. Switching losses are dominated by gate charge of the switching device, gate voltage of the switching device, and switching frequency. Applications where operating switching frequency is high, the switching losses start to impact overall system efficiency. In such applications, to reduce the switching losses it becomes essential to reduce the gate voltage. The gate voltage is determined by the supply voltage the gate driver ICs, therefore, the gate driver IC needs to operate at lower supply voltage in such applications. UCC27289 gate driver has typical UVLO level of 7.0V and therefore, they are perfectly suitable for applications where bias voltage need to be reduced from 12V to 10V or even 9.5V. HB UVLO is lower than the VDD UVLO so that bootstrap diode voltage drop does not inhibit this lower bias voltage opearion. There is enough UVLO hysteresis provided to avoid any chattering or nuisance tripping which improves system robustness.