SLUSA13E February   2010  – November 2023 UCC27321-Q1 , UCC27322-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Description (continued)
  6. Related Products
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
      3. 8.3.3 Source and Sink Capabilities During Miller Plateau
      4. 8.3.4 VDD
      5. 8.3.5 Drive Current and Power Requirements
      6. 8.3.6 Enable
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input-to-Output Configuration
        2. 9.2.2.2 Input Threshold Type
        3. 9.2.2.3 VDD Bias Supply Voltage
        4. 9.2.2.4 Peak Source and Sink Currents
        5. 9.2.2.5 Enable and Disable Function
        6. 9.2.2.6 Propagation Delay
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
    1.     40
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
    4. 11.4 Power Dissipation
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The UCC2732x-Q1 family of high-speed drivers delivers 9 A of peak drive current in an industry-standard pinout. These drivers can drive large MOSFETs for systems requiring extreme Miller current due to high dV/dt transitions. This eliminates additional external circuits and can replace multiple components to reduce space, design complexity, and assembly cost. Two standard logic options are offered, inverting (UCC27321-Q1) and noninverting (UCC27322-Q1).

Using a design that minimizes shoot-through current, the outputs of these devices can provide high gate drive current where it is most needed at the Miller plateau region during the MOSFET switching transition. A unique hybrid-output stage paralleling bipolar and MOSFET transistors (TrueDrive) allows efficient current delivery at low supply voltages. With this drive architecture, UCC2732x-Q1 can be used in industry standard 6-A, 9-A, and many 12-A driver applications. Latch-up and ESD protection circuits are also included. Finally, the UCC2732x-Q1 provides an enable (ENBL) function to better control the operation of the driver applications. ENBL is implemented on pin 3, which was previously left unused in the industry-standard pinout. It is internally pulled up to VDD for active-high logic and can be left open for standard operation.

Device Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
UCC27321-Q1, UCC27322-Q1SOIC (8)6.00 mm × 4.90 mm
UCC27322-Q1MSOP-PowerPAD (8)4.90 mm × 3.00 mm
For all available packages, see the orderable addendum at the end of the data sheet.
GUID-82698BA8-0B68-4388-9C08-6D09CF8EDF75-low.gif Functional Block Diagram