• Qualified for automotive applications
• AEC-Q100 qualified with the following results:
  • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
• Industry-standard pin out
• Two independent gate-drive channels
• 5A peak source and sink-drive current
• Independent enable function for each output
• TTL and CMOS-compatible logic threshold independent of supply voltage
• Hysteretic-logic thresholds for high-noise immunity
• Ability to handle negative voltages (–5V) at inputs
• Inputs and enable pin voltage levels not restricted by V_DD pin bias supply voltage
• 4.5V to 18V single supply range
• Outputs held low during V_DD-UVLO, (ensures glitch-free operation at power up and power down)
• Fast propagation delays (17ns typical)
• Fast rise and fall times (3.5ns and 6ns typical)
• 1ns typical delay matching between two channels
• Ability to parallel two outputs for high-drive current
• Outputs held low when inputs are floating
• MSOP-8 PowerPad™ package
• Operating junction temperature range of –40°C to 150°C

• Automotive
• Switch-mode power supplies
• DC-to-DC converters
• Motor control, solar power
• Gate drive for emerging wide band-gap power devices such as GaN

The UCC27524A1-Q1 device is a dual-channel, high-speed, low-side, gate-driver device capable of effectively driving MOSFET and IGBT power switches. The UCC27524A1-Q1 device is a variant of the UCC2752x family. The UCC27524A1-Q1 device adds the ability to handle –5V directly at the input pins for increased robustness. The UCC27524A1-Q1 device is a dual, non-inverting driver. Using a design that inherently minimizes shoot-through current, the UCC27524A1-Q1 device is capable of delivering high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 17ns). In addition, the drivers feature matched, internal-propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with a single input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the V_DD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

Dual Noninverting Inputs

For protection purposes, internal pull-up and pull-down resistors on the input pins of the UCC27524A1-Q1 device ensure that outputs are held LOW when input pins are in floating condition. The UCC27524A1-Q1 device features enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to V_DD for active-high logic and are left open for standard operation.

The UCC27524A1-Q1 devices is available in a MSOP-PowerPAD-8 with exposed pad (DGN) package.