SLUSBA5F December   2012  – March 2018 UCC27611

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD and Undervoltage Lockout
      2. 7.3.2 Operating Supply Current
      3. 7.3.3 Input Stage
      4. 7.3.4 Enable Function
      5. 7.3.5 Output Stage
      6. 7.3.6 Low Propagation Delays
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Gate Drive Supply Voltage
        2. 8.2.2.2 Input Configuration
        3. 8.2.2.3 Output Configuration
        4. 8.2.2.4 Power Dissipation
        5. 8.2.2.5 Thermal Considerations
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.4 Power Dissipation

Power dissipation of the gate driver has two portions as shown in Equation 1:

Equation 1. UCC27611 qu1_lusba5.gif

The DC portion of the power dissipation is PDC = IQ × VDD where IQ is the quiescent current for the driver. The quiescent current is the current consumed by the device to bias all internal circuits such as input stage, reference voltage, logic circuits, protections, and so forth and also any current associated with switching of internal devices when the driver output changes state (such as charging and discharging of parasitic capacitances, parasitic shoot-through and so forth). The UCC27611 device features very low quiescent currents (see Electrical Characteristics) and contains internal logic to eliminate any shoot-through in the output driver stage. Thus, the effect of the PDC on the total power dissipation within the gate driver can be safely assumed to be negligible.

The power dissipated in the gate-driver package during switching (PSW) depends on the following factors:

  • Gate charge required of the power device (usually a function of the drive voltage VG, which is very close to input bias supply voltage VREF due to low VOH dropout)
  • Switching frequency
  • Use of external gate resistors

When a driver device is tested with a discrete, capacitive load it is a fairly simple matter to calculate the power that is required from the bias supply. The energy that must be transferred from the bias supply to charge the capacitor is given by Equation 2:

Equation 2. UCC27611 qu2_lusba5.gif

where

  • CLOAD is load capacitor of driver.

There is an equal amount of energy dissipated when the capacitor is charged. This leads to a total power loss given by Equation 3.

Equation 3. UCC27611 qu3_lusba5.gif

where

  • fSW is the switching frequency.

The switching load presented by a power MOSFET and IGBT can be converted to an equivalent capacitance by examining the gate charge required to switch the device. This gate charge includes the effects of the input capacitance plus the added charge needed to swing the drain voltage of the power device as it switches between the ON and OFF states. Most manufacturers provide specifications of typical and maximum gate charge, in nC, to switch the device under specified conditions. Using the gate charge QG, one can determine the power that must be dissipated when charging a capacitor. This is done by using the equation, QG = CLOAD × VREF, to provide Equation 4 for power:

Equation 4. UCC27611 qu4_lusba5.gif

This power PG is dissipated in the resistive elements of the circuit when the MOSFET or IGBT is being turned on or off. Half of the total power is dissipated when the load capacitor is charged during turnon, and the other half is dissipated when the load capacitor is discharged during turnoff. When no external gate resistor is employed between the driver and MOSFET and IGBT, this power is completely dissipated inside the driver package. With the use of external gate-drive resistors, the power dissipation is shared between the internal resistance of driver and external gate resistor in accordance to the ratio of the resistances (more power dissipated in the higher resistance component). Based on this simplified analysis, the driver power dissipation during switching is calculated as Equation 5:

Equation 5. UCC27611 qu5_lusba5.gif

where

  • ROFF = ROL and RON = 2.7 × ROL (effective resistance of pullup structure).
  • RGH and RGL is external gate resistors connect to the OUTH and OUTL pins respective.