SLUSFL4A April   2024  – October 2024 UCC27614-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 VDD Undervoltage Lockout
      2. 6.3.2 Input Stage
      3. 6.3.3 Enable Function
      4. 6.3.4 Output Stage
    4. 6.4 Device Functional Modes
  8. Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Driving MOSFET/IGBT/SiC MOSFET
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Input-to-Output Configuration
          2. 7.2.1.2.2 Input Threshold Type
          3. 7.2.1.2.3 VDD Bias Supply Voltage
          4. 7.2.1.2.4 Peak Source and Sink Currents
          5. 7.2.1.2.5 Enable and Disable Function
          6. 7.2.1.2.6 Propagation Delay and Minimum Input Pulse Width
          7. 7.2.1.2.7 Power Dissipation
        3. 7.2.1.3 Application Curves
  9. Power Supply Recommendations
  10. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
    3. 9.3 Thermal Consideration
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DSG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information
Input-to-Output Configuration

The design should specify which type of input-to-output configuration should be used. If turning on the power MOSFET or IGBT when the input signal is in high state is preferred, then a device capable of the non-inverting configuration must be selected. If turning off the power MOSFET or IGBT when the input signal is in high state is preferred, then a device capable of the inverting configuration must be chosen. UCC27614-Q1DSG offers non-inverting output when IN+ pin is used as PWM input while IN- is grounded. When IN- pin is used as PWM input and IN+ is pulled high, the UCC27614-Q1DSG works as inverting output gate driver.

If ground-bouncing is a potential issue, a gate driver with negative voltage handling capability should be chosen. UCC27614-Q1 devices can handle -10-V at its input and -2-V on its output. The input of the UCC27614-Q1 devices can handle wide range of slew rate at its input and the inputs have wide hysteresis.