SLUSAO7C September 2011 – July 2024 UCC28063
PRODUCTION DATA
The UCC28063 detects failure of either of the phases by monitoring the sequence of ZCD pulses. During normal two-phase operation, if one ZCD input remains idle for longer than approximately 12 ms while the other ZCD input switches normally, the over-current threshold is reduced and PWMCNTL goes to a high-impedance state, indicating that the PFC power stage is not operating correctly. During normal single-phase operation (PHB < 0.8 V), phase failure is not monitored. Also on the UCC28063, phase failure is not monitored when COMP is below approximately 222 mV.