Transition Mode Control is the most popular choice for the Boost Power Factor Correction topology at lower power levels because of its lower complexity in achieving high power factor while at the same time not placing demanding requirements on the power component specifications. A lower cost boost diode with higher reverse recovery current specification may be used, for instance, in the Transition Mode Boost. Interleaved Transition Mode Control retains this benefit and generally extends the applicability up to much higher power levels while simultaneously conferring the interleaving benefits of reduced input and output ripple, phase management for light load efficiency enhancement, redundancy, system thermal optimization and low profile or planar solutions.

The UCC28063 enables a very cost effective solution with a particular focus on ruggedness, fault management, fault recovery, efficiency and higher end performance in areas such as acoustic management and fast transient response. It may be regarded as an enhanced and new generation UCC28061.

Interleaving control and phase management facilitates 80+ and Energy Star designs with reduced input and output ripple. The Natural Interleaving method allows TM operation and achieves 180 degrees between the phases by On-time management and does not rely on tight tolerance requirements on the inductors. The Crossover Notch Reduction block implements a non-linear current shaping characteristic on the instantaneous voltage sense (VINAC) in order to reduce distortion and increase Power Factor. Negative current sensing is implemented on the total input current instead of just the MOSFET current which prevents MOSFET switching during inrush surges or in any mode where the inductor current may become substantially continuous (CCM). This prevents reverse recovery conduction events between the MOSFET and output rectifier. Downstream power stage management is facilitated by the PWMCNTL signal. This open drain signal provides an enable with hysteresis for a downstream converter when the PFC stage voltage is above an operating threshold, FailSafe OV protection is not in operation and there is no PhaseFail fault.

Independent output voltage sense chains with their separate fault management behaviors provide a high degree of redundancy against PFC stage overvoltage. Brown-Out, HVSENSE OV, UVLO, Open/ Fault detect on TSET, Open on CS and IC Overtemperature will all cause a complete Soft-Start cycle. Other faults such as short duration AC Drop-Out, minor overvoltage or cycle-by-cycle overcurrent cause a live recovery process to initiate by pulling down on the COMP pin or by terminating the pulses early.

In general IC operation is designed to ensure smooth and acoustic noise free start-up, good transient response behavior and well behaved recovery from faults. The Error amplifier transconductance is designed to allow smaller compensation components and optimum transient response for larger deviations. The Soft-Start process is carefully optimized. A complete Soft Start is implemented on recovery from every fault, for consistency. The Soft Start speed is dependent on the output voltage sense to speed up start-up from low AC line and to minimize the effect of excessive "COMP" during start-up into no-load. This complete discharge of COMP aids with preventing excessive currents on recovery from an AC Brown-Out event.