SLUSBD8E February   2013  – December 2014 UCC28251

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 UCC28251 Enhancements Over the UCC28250
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VDD (5/12)
      2. 8.3.2  VREF (Reference Generator) (20/7)
      3. 8.3.3  EN (Enable Pin) (18/5)
      4. 8.3.4  RT (Oscillator Frequency Set and Synchronization) (15/2)
      5. 8.3.5  SP (Synchronous Rectifier Turn-Off to Primary Output Turn-On Dead Time Programming) (13/19)
      6. 8.3.6  PS (Primary Output Turn-Off to Synchronous Rectifier Turn-On Dead Time Programming) (11/18)
      7. 8.3.7  RAMP/CS (PWM Ramp Input or Current Sense Input) (16/3)
        1. 8.3.7.1 RAMP: Voltage Mode Control With Feed-Forward Operation
        2. 8.3.7.2 CS: Current Mode Control
      8. 8.3.8  REF/EA+ (1/8)
      9. 8.3.9  FB/EA- (2/9)
      10. 8.3.10 COMP (3/10)
      11. 8.3.11 VSENSE (14/1)
      12. 8.3.12 SS (Soft Start Programming Pin) (13/20)
      13. 8.3.13 ILIM (Current Limit for Cycle-by-Cycle Over-Current Protection) (17/4)
      14. 8.3.14 HICC (10/17)
      15. 8.3.15 OVP/OTP (19/6)
      16. 8.3.16 OUTA (9/16) and OUTB (8/15)
      17. 8.3.17 SRA (7/14) and SRB (6/13)
      18. 8.3.18 GND (4/11)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Error Amplifier and PWM Generation
      2. 9.1.2 Prebiased Start Up
        1. 9.1.2.1 Secondary-Side Control
        2. 9.1.2.2 Primary-Side Control
      3. 9.1.3 Voltage Mode Control and Input Voltage Feed-Forward
        1. 9.1.3.1 Condition 1
        2. 9.1.3.2 Condition 2
        3. 9.1.3.3 Condition 3
      4. 9.1.4 Peak Current Mode Control
      5. 9.1.5 Cycle-by-Cycle Current Limit and Hiccup Mode Protection
    2. 9.2 Typical Applications
      1. 9.2.1 Circuit Diagram in Design Example
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Step 1: Power Stage Design
          2. 9.2.1.2.2 Step 2: Feedback Loop Design
          3. 9.2.1.2.3 Step 3: Programming The Device
            1. 9.2.1.2.3.1 Step 3-1
            2. 9.2.1.2.3.2 Step 3-2: Determine Ramp Resistance and Capacitance
          4. 9.2.1.2.4 Step 3-3: Determine Soft-Start Capacitance
          5. 9.2.1.2.5 Step 3-4: Determine Dead-Time Resistance
          6. 9.2.1.2.6 Step 3-5: Determine OCP Hiccup Off-Time Capacitance
          7. 9.2.1.2.7 Step 3-6: Determine Primary-Side OVP Resistance
          8. 9.2.1.2.8 Step 3-7: Select Capacitance for VDD and VREF
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Secondary-Side Half-Bridge Controller With Synchronous Rectification
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Protection
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

UCC28251 pinout_lusa29.gif
UCC28251 pinout2_lusa29.gif

Pin Functions

PIN I/O DESCRIPTION
QFN-20 PW-20 NAME
5 12 VDD I Bias supply input.
20 7 VREF O 3.3-V reference output.
18 5 EN I Device enable and disable.
15 2 RT I Oscillator frequency set or synchronous clock input.
12 19 SP I Synchronous rectifier off to primary on dead-time set .
11 18 PS I Primary off to synchronous rectifier on dead-time set .
16 3 RAMP/CS I PWM ramp input (for voltage mode control) or current sense input (for current mode control).
1 8 REF/EA+ I Error amplifier non-inverting input.
2 9 FB/EA- I Error amplifier inverting input.
3 10 COMP I/O Error amplifier output.
14 1 VSENSE I Output voltage sensing for pre-bias control.
13 20 SS I/O Soft-start programming.
17 4 ILIM I Current sense for cycle-by-cycle over-current protection.
10 17 HICC I Cycle-by-cycle current limit time delay and Hiccup time setting.
19 6 OVP/OTP I Over voltage and over temperature protection pin.
9 16 OUTA O 0.2-A sink/source primary switching output.
8 15 OUTB O 0.2-A sink/source primary switching output.
7 14 SRA O 0.2-A sink/source synchronous rectifier output.
6 13 SRB O 0.2-A sink/source synchronous rectifier output.
4 11 GND I Ground.