SLUSBW3D March   2014  – December 2017 UCC28630 , UCC28631 , UCC28632 , UCC28633 , UCC28634

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Typical Application Measured Regulation
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     PIN Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information (UCC28630, UCC28631)
    5. 7.5 Thermal Information (UCC28632, UCC28633, (UCC28630, UCC28634)
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  High-Voltage Current Source Start-Up Operation
      2. 8.3.2  AC Input UVLO / Brownout Protection
      3. 8.3.3  Active X-Capacitor Discharge (UCC28630 and UCC28633 only)
        1. 8.3.3.1 Improved Performance with UCC28630 and UCC28633
      4. 8.3.4  Magnetic Input and Output Voltage Sensing
      5. 8.3.5  Fixed-Point Magnetic Sense Sampling Error Sources
      6. 8.3.6  Magnetic Sense Resistor Network Calculations
        1. 8.3.6.1 Step 1
        2. 8.3.6.2 Step 2
        3. 8.3.6.3 Step 3
        4. 8.3.6.4 Step 4
      7. 8.3.7  Magnetic Sensing: Power Stage Design Constraints
      8. 8.3.8  Magnetic Sense Voltage Control Loop
      9. 8.3.9  Peak Current Mode Control
      10. 8.3.10 IPEAK Adjust vs. Line
      11. 8.3.11 Primary-Side Constant-Current Limit (CC Mode)
      12. 8.3.12 Primary-Side Overload Timer (UCC28630 only)
      13. 8.3.13 Overload Timer Adjustment (UCC28630 only)
      14. 8.3.14 CC-Mode IOUT(lim) Adjustment
      15. 8.3.15 Fault Protections
      16. 8.3.16 Pin-Fault Detection and Protection
      17. 8.3.17 Over-Temperature Protection
      18. 8.3.18 External Fault Input
      19. 8.3.19 External SD Pin Wake Input (except UCC28633)
      20. 8.3.20 External Wake Input at VSENSE Pin (UCC28633 Only)
      21. 8.3.21 Mode Control and Switching Frequency Modulation
      22. 8.3.22 Frequency Dither For EMI (except UCC28632)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Internal Key Parameters
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Notebook Adapter, 19.5 V, 65 W
      2. 9.2.2 UCC28630 Application Schematic
      3. 9.2.3 Design Requirements
      4. 9.2.4 Detailed Design Procedure
        1. 9.2.4.1  Custom Design With WEBENCH® Tools
        2. 9.2.4.2  Input Bulk Capacitance and Minimum Bulk Voltage
        3. 9.2.4.3  Transformer Turn Ratio
        4. 9.2.4.4  Transformer Magnetizing Inductance
        5. 9.2.4.5  Current Sense Resistor RCS
        6. 9.2.4.6  Transformer Constraint Verification
        7. 9.2.4.7  Transformer Selection and Design
        8. 9.2.4.8  Slope Compensation Verification
        9. 9.2.4.9  Power MOSFET and Output Rectifier Selection
        10. 9.2.4.10 Output Capacitor Selection
        11. 9.2.4.11 Calculation of CC Mode Limit Point
        12. 9.2.4.12 VDD Capacitor Selection
        13. 9.2.4.13 Magnetic Sense Resistor Network Selection
        14. 9.2.4.14 Output LED Pre-Load Resistor Calculation
      5. 9.2.5 External Wake Pulse Calculation at VSENSE Pin (UCC28633 Only)
      6. 9.2.6 Energy Star Average Efficiency and Standby Power
      7. 9.2.7 Application Performance Plots
    3. 9.3 Dos and Don'ts
      1. 9.3.1 Test and Debug Recommendations
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 HV Pin
      2. 11.1.2 VDD Pin
      3. 11.1.3 VSENSE Pin
      4. 11.1.4 CS Pin
      5. 11.1.5 SD Pin
      6. 11.1.6 DRV Pin
      7. 11.1.7 GND Pin
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
        1. 12.2.1.1 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Transformer Selection and Design

After determining the value of current sense resistor RCS, determine the maximum peak current at maximum demand point on the modulator. Accommodate for the IPEAK adjustment for frequency dithering. Use this value when calculating the margin for core saturation. In this case, IPK(sat) calculates to 4.13 A.

Equation 29. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu30_lusbw3.gif

In subsequent calculations of required primary turns etc, the average maximum peak current, IPK(max) , during the frequency dither period should be used, which calculates to 4.0 A.

Equation 30. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu31_lusbw3.gif

Knowing IPK(max), LPRI and the turns ratio, the choice of transformer size and core shape and type dictates the required number of primary, secondary and bias turns, and the size of the air-gap. Various trade-offs, design preferences, and transformer design targets (size, cost, target losses, etc.) influence the specific choice of transformer core in any given design.

In the case of the UCC28630EVM-572 (PWR572 EVM), core area-product geometry was used to choose the minimum core size available to meet the power level. The core geometry factor Kg is a figure-of-merit that reflects the core power capability, in terms of its physical size, shape and design. It combines the core effective cross-sectional area, Ae, winding window area, Aw, and the mean length per turn (MLT) of wire around the core.

Equation 31. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu32_lusbw3.gif

Estimate the required design core geometry, KG(des), using the required transformer inductance LPRI, maximum peak current IPK(max), allowed maximum core flux density Bmax and a target copper loss budget, PCU.

Equation 32. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu33_lusbw3.gif

where

  • ρcu is the resistivity of Copper (approximately 1.7 × 10-8 Ωm at room temperature, 2.2 × 10-8 Ωm at 100°C),
  • Ku is a winding window utilization factor that accounts for the percentage of the window that is occupied by Copper

Ku can often be as low as 25%, due to the fill factor (gaps between wires), wire insulation (especially for triple-insulated wire), and the need for insulating tapes and EMC shielding layers. The estimate of the required core geometry needs an estimate of the aggregate total winding current ITOT. The analysis models the flyback transformer primary and secondary windings as a single lumped non-isolated inductor (such as a single winding buck inductor), only for the purpose of sizing the required core winding window to achieve the target copper loss. In this case, the secondary-side current amplitude reflects to the primary side so that aggregate total primary current. ITOT can be estimated in Equation 33.

Equation 33. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu34_lusbw3.gif

where

  • d is the primary on-time duty cycle
  • dSEC is the secondary-side flyback period duty cycle

At rated power and minimum bulk capacitor voltage, the inductance LPRI has been chosen to achieve boundary-mode conduction, therefore the duty cycle is given in Equation 34.

Equation 34. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu35_lusbw3.gif

and

Equation 35. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu36_lusbw3.gif

At the boundary conduction point, the primary peak current IPK is at the level set by the modulator, VCS(bcm). So from Equation 33, ITOT becomes Equation 36.

Equation 36. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu37_lusbw3.gif

Equation 36 calculates ITOT as 2.6 A. Thus the required design KG(des), assuming KU of 25%, Bmax of 315 mT and a target of 1-W copper loss, is shown in Equation 37.

Equation 37. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu38_lusbw3.gif

Equation 37 indicates that this design requires a core size and shape with a KG of more than 6.9 × 10-12. A review of commonly used cores indicated that the RM10/I core set meets this requirement. With Ae of 96.6 mm2, Aw of 44.2 mm2 and mean length per turn (MLT) of 52 mm, KG(RM10) is 7.9 × 10–12, giving some margin over the design target.

Equation 38. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu39_lusbw3.gif

With the chosen core, the actual primary, secondary-side and bias turns can be calculated. The required primary turns depend on the allowed Bmax. For most power ferrites, a value in the region of 315 mT is commonly used.

Equation 39. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu40_lusbw3.gif

Round NP to 34. Now the required secondary-side turns can be calculated, using the previously calculated turns ratio per Equation 23.

Equation 40. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu41_lusbw3.gif

Again, NS is rounded to 6. Due to the integer rounding of the turns count, ensure that the actual turns ratio is within 5% of original target (if outside this range, secondary-side rectifier or primary MOSFET stress may be too high).

Equation 41. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu42_lusbw3.gif

From Equation 24, the required bias turns can be calculated using Equation 42.

Equation 42. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu43_lusbw3.gif

Again, NB is rounded to 4. The effect of integer scaling in the turns is verified by calculating the expected bias voltage versus target.

Equation 43. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu44_lusbw3.gif

The VBIAS target was 12 V, so this is acceptable.

The required core inductance factor, AL, to achieve the target inductance can be calculated as in Equation 44. The transformer manufacturer uses this factor to gap the core center leg.

Equation 44. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu45_lusbw3.gif

Finally, calculate the required air-gap length lg, based on the required inductance and the core geometry.

Equation 45. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu46_lusbw3.gif

where

  • μ0 is the permittivity of free-air
  • μr is the relative permeability of the chosen core ferrite material
  • ACENTRE is the cross-sectional area of the core center leg
  • lm is the core average magnetic path length

For the RM10/I core in 3C95 material (chosen for low core loss over a wide temperature range), the required air-gap length is calaulated using Equation 46.

Equation 46. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu47_lusbw3.gif

Typically, the air-gap calculation in Equation 45 underestimates lg, due to flux fringing in the air-gap. The fringing causes the affective area of the air-gap Ag to be somewhat larger than the ferrite core center leg ACENTRE, depending on the gap length. This difference requires an increase in the required air-gap length to get the required inductance, which results in a further increase in fringing. However use Equation 45 to determine an initial value for lg, which can then be used to estimate Ag. For round centre legs, the increase in effective area within the gap can be estimated empirically from Equation 47

Equation 47. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu48_lusbw3.gif

where

  • DCENTRE is the center leg diameter

(For more information about this subject, download the paper Inductor and Flyback Transformer Design, Lloyd Dixon, TI Power Supply Design Seminar SLUP127).

Because Equation 45 assumes that Ag equals ACENTRE, it must be modified using Equation 48.

Equation 48. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu49_lusbw3.gif

Re-iterating the air-gap calculation in Equation 49 .

Equation 49. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu50_lusbw3.gif

Typically, after the second iteration above in Equation 48, the estimated air-gap is very close to the required value. Further iterations can be made, but should not be necessary.