SLUSCA8A February   2016  – February 2016 UCC28704

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 VDD (Device Bias Voltage Supply)
        2. 7.3.1.2 GND (Ground)
        3. 7.3.1.3 VS (Voltage-Sense)
        4. 7.3.1.4 DRV (Gate Drive)
        5. 7.3.1.5 CS (Current Sense)
        6. 7.3.1.6 NTC/SU (NTC Thermistor Shutdown and External Start Up Control)
      2. 7.3.2 Primary-Side Regulation (PSR)
      3. 7.3.3 Primary-Side Constant Voltage (CV) Regulation
      4. 7.3.4 Primary-Side Constant Current (CC) Regulation
      5. 7.3.5 Valley-Switching and Valley-Skipping
      6. 7.3.6 Start-Up Operation
        1. 7.3.6.1 Initial Power-On with a Start-Up Resistor
        2. 7.3.6.2 Initial Power-On with A Depletion-Mode FET
      7. 7.3.7 Fault Protection
      8. 7.3.8 Constant Current Under-Voltage Protection
      9. 7.3.9 Load Transient Response
    4. 7.4 Device Functional Modes
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD Capacitance, CDD
        2. 8.2.2.2 VDD Start-Up Resistance, RSTR
        3. 8.2.2.3 Input Bulk Capacitance and Minimum Bulk Voltage
        4. 8.2.2.4 Transformer Turns Ratio, Inductance, Primary-Peak Current
        5. 8.2.2.5 Transformer Parameter Verification
        6. 8.2.2.6 VS Resistor Divider, Line Compensation, and NTC
        7. 8.2.2.7 Standby Power Estimate
        8. 8.2.2.8 Output Capacitance
        9. 8.2.2.9 Design Considerations in Using with Synchronous Rectifiers
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
        1. 11.1.1.1  Capacitance Terms in Farads
        2. 11.1.1.2  Duty Cycle Terms
        3. 11.1.1.3  Frequency Terms in Hertz
        4. 11.1.1.4  Current Terms in Amperes
        5. 11.1.1.5  Current and Voltage Scaling Terms
        6. 11.1.1.6  Transformer Terms
        7. 11.1.1.7  Power Terms in Watts
        8. 11.1.1.8  Resistance Terms in Ω
        9. 11.1.1.9  Timing Terms in Seconds
        10. 11.1.1.10 Voltage Terms in Volts
        11. 11.1.1.11 AC Voltage Terms in VRMS
        12. 11.1.1.12 Efficiency Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Device and Documentation Support

11.1 Device Support

11.1.1 Device Nomenclature

11.1.1.1 Capacitance Terms in Farads

    CBULK total input capacitance of CB1 and CB2.
    CDD minimum required capacitance on the VDD pin.
    COUT minimum output capacitance required.

11.1.1.2 Duty Cycle Terms

    DMAGCC secondary diode conduction duty cycle in CC, 0.475.
    DMAX maximum MOSFET on-time duty cycle.

11.1.1.3 Frequency Terms in Hertz

    fLINE minimum line frequency.
    fMAX target full-load maximum switching frequency of the converter.
    fMIN minimum switching frequency of the converter, add 15% margin over the fSW(min) limit of the device.
    fSW(lim) switching frequency in transient after a load step-down change
    fSW(standby) switching frequency before load change at light load condition

11.1.1.4 Current Terms in Amperes

    IOCC converter output constant-current target.
    IOR converter rated output current.
    IPP(max) maximum transformer primary current.
    ITRAN required positive load-step current.

11.1.1.5 Current and Voltage Scaling Terms

    KCo stability factor of 100, used in calculations for COUT.

11.1.1.6 Transformer Terms

    LP transformer primary inductance.
    LS transformer secondary inductance.
    NAS transformer auxiliary-to-secondary turns ratio.
    NPA transformer primary-to-auxiliary turns ratio.
    NPS transformer primary-to-secondary turns ratio.
    NA tnumber of turns of transformer auxiliary winding.
    NP tnumber of turns of transformer primary winding.
    NS tnumber of turns of transformer secondary winding.

11.1.1.7 Power Terms in Watts

    PIN converter maximum input power.
    POUT full-load output power of the converter.
    PRSTR VDD start-up resistor power dissipation.
    PSB total stand-by power.
    PSB_CONV PSB minus start-up resistor and snubber losses.

11.1.1.8 Resistance Terms in Ω

    RCS primary current programming resistance
    RESR total ESR of the output capacitor(s).
    RPL preload resistance on the output of the converter.
    RS1 high-side VS pin resistance.
    RS2 low-side VS pin resistance.
    RSTR Start-up resistor connected between bulk voltage and VDD

11.1.1.9 Timing Terms in Seconds

    tD current-sense delay.
    tDMAG(min) minimum secondary rectifier conduction time.
    tGATE_OFF primary-side main MOSFET turn-off time.
    tON(min) minimum MOSFET on time.
    tR period of the resonant ringing after tDMAG.
    tSTR power-on delay time due to charge-up time needed for VDD capacitance CDD.

11.1.1.10 Voltage Terms in Volts

    VBLK or VBULK bulk capacitor voltage.
    VBULK(max) highest bulk capacitor voltage for stand-by power measurement.
    VBULK(min) minimum voltage on CB1 and CB2 at full power.
    VBULK(run) converter start-up (run) bulk voltage.
    VCBC cable compensation voltage at the output of board-end at full load.
    VF secondary rectifier forward voltage drop at near-zero current.
    VFA auxiliary rectifier forward voltage drop.
    VLK estimated leakage inductance energy reset voltage.
    VOCV regulated output voltage of the converter.
    VOCC target lowest converter output voltage in constant-current regulation.
    VRIPPLE output peak-to-peak ripple voltage at full-load.

11.1.1.11 AC Voltage Terms in VRMS

    VIN(max) maximum input voltage to the converter.
    VIN(min) minimum input voltage to the converter.
    VIN(run) converter input start-up (run) voltage.

11.1.1.12 Efficiency Terms

    η converter overall efficiency.
    η10 efficiency at 10% load.
    ηAVG arithmetic average of efficiency at load level 25%, 50%, 75%, and 100%  .
    ηXFMR transformer primary-to-secondary power transfer efficiency.

11.2 Documentation Support

11.2.1 Related Documentation

For related documentation see the following:

    Using the UCC28704-1EVM-724, Evaluation Module, SLUUBF1

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments.

11.5 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

11.6 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.