SLUSCA8A February   2016  – February 2016 UCC28704

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 VDD (Device Bias Voltage Supply)
        2. 7.3.1.2 GND (Ground)
        3. 7.3.1.3 VS (Voltage-Sense)
        4. 7.3.1.4 DRV (Gate Drive)
        5. 7.3.1.5 CS (Current Sense)
        6. 7.3.1.6 NTC/SU (NTC Thermistor Shutdown and External Start Up Control)
      2. 7.3.2 Primary-Side Regulation (PSR)
      3. 7.3.3 Primary-Side Constant Voltage (CV) Regulation
      4. 7.3.4 Primary-Side Constant Current (CC) Regulation
      5. 7.3.5 Valley-Switching and Valley-Skipping
      6. 7.3.6 Start-Up Operation
        1. 7.3.6.1 Initial Power-On with a Start-Up Resistor
        2. 7.3.6.2 Initial Power-On with A Depletion-Mode FET
      7. 7.3.7 Fault Protection
      8. 7.3.8 Constant Current Under-Voltage Protection
      9. 7.3.9 Load Transient Response
    4. 7.4 Device Functional Modes
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD Capacitance, CDD
        2. 8.2.2.2 VDD Start-Up Resistance, RSTR
        3. 8.2.2.3 Input Bulk Capacitance and Minimum Bulk Voltage
        4. 8.2.2.4 Transformer Turns Ratio, Inductance, Primary-Peak Current
        5. 8.2.2.5 Transformer Parameter Verification
        6. 8.2.2.6 VS Resistor Divider, Line Compensation, and NTC
        7. 8.2.2.7 Standby Power Estimate
        8. 8.2.2.8 Output Capacitance
        9. 8.2.2.9 Design Considerations in Using with Synchronous Rectifiers
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
        1. 11.1.1.1  Capacitance Terms in Farads
        2. 11.1.1.2  Duty Cycle Terms
        3. 11.1.1.3  Frequency Terms in Hertz
        4. 11.1.1.4  Current Terms in Amperes
        5. 11.1.1.5  Current and Voltage Scaling Terms
        6. 11.1.1.6  Transformer Terms
        7. 11.1.1.7  Power Terms in Watts
        8. 11.1.1.8  Resistance Terms in Ω
        9. 11.1.1.9  Timing Terms in Seconds
        10. 11.1.1.10 Voltage Terms in Volts
        11. 11.1.1.11 AC Voltage Terms in VRMS
        12. 11.1.1.12 Efficiency Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

SOT23-6 Package
6-Pin DBV
Top View
UCC28704 pin_lusca8.gif

Pin Functions

PIN I/O(1) DESCRIPTION
NAME NO.
NTC/SU 1 I/O NTC/SU is a multi-function pin. First, it provides an interface to an external NTC (negative temperature coefficient) resistor for remote temperature sensing. Pulling this pin low shuts down PWM action. Additionally, when used with an external depletion-mode FET and a low-voltage NPN transistor this pin provides high-voltage start up control.  A maximum 100-pF noise filter capacitance may be added to this pin. The pin should be left floating if not used.
VDD 2 P VDD is the bias supply input pin to the device.
DRV 3 O DRV is an output pin used to drive the gate of an external high voltage MOSFET switching transistor.
CS 4 I CS input connects to a ground referenced current sense resistor in series with the power switch. The resulting voltage is used to monitor and control the peak-primary current. A series resistor is added to this pin to compensate the peak-primary current levels as the AC mains input varies. A small capacitance, up to 30 pF, can be added to this pin to filter the current sense signal.
GND 5 G GND pin is both the reference pin for the controller and the low-side return for the drive output.  Special care should be taken to return all AC decoupling capacitors as close as possible to this pin and avoid any common-mode signal trace length with analog signal return paths.
VS 6 I VS is an input used to provide voltage and timing feedback to the controller. This pin is connected to a voltage divider between an auxiliary winding and GND. The value of the upper resistor of this divider is used to program the AC-mains run-and-stop thresholds and line compensation at the CS pin. Avoid placing a filter capacitor on this input which would interfere with accurate sensing of this waveform.
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