SLUSCR9B June   2017  – December 2020 UCC28730-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 VDD (Device Bias Voltage Supply)
        2. 7.3.1.2 GND (Ground)
        3. 7.3.1.3 HV (High Voltage Startup)
        4. 7.3.1.4 DRV (Gate Drive)
        5. 7.3.1.5 CBC (Cable Compensation)
        6. 7.3.1.6 VS (Voltage Sense)
        7. 7.3.1.7 CS (Current Sense)
      2. 7.3.2 Primary-Side Regulation (PSR)
      3. 7.3.3 Primary-Side Constant Voltage Regulation
      4. 7.3.4 Primary-Side Constant Current Regulation
      5. 7.3.5 Wake-Up Detection and Function
      6. 7.3.6 Valley-Switching and Valley-Skipping
      7. 7.3.7 Startup Operation
      8. 7.3.8 Fault Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stand-By Power Estimate
        2. 8.2.2.2 Input Bulk Capacitance and Minimum Bulk Voltage
        3. 8.2.2.3 Transformer Turns Ratio, Inductance, Primary-Peak Current
        4. 8.2.2.4 Transformer Parameter Verification
        5. 8.2.2.5 Output Capacitance
        6. 8.2.2.6 VDD Capacitance, CVDD
        7. 8.2.2.7 VS Resistor Divider, Line Compensation, and Cable Compensation
        8. 8.2.2.8 VS Wake-Up Detection
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
        1. 11.1.1.1  Capacitance Terms in Farads
        2. 11.1.1.2  Duty-Cycle Terms
        3. 11.1.1.3  Frequency Terms in Hertz
        4. 11.1.1.4  Current Terms in Amperes
        5. 11.1.1.5  Current and Voltage Scaling Terms
        6. 11.1.1.6  Transformer Terms
        7. 11.1.1.7  Power Terms in Watts
        8. 11.1.1.8  Resistance Terms in Ω
        9. 11.1.1.9  Timing Terms in Seconds
        10. 11.1.1.10 DC Voltage Terms in Volts
        11. 11.1.1.11 AC Voltage Terms in Volts
        12. 11.1.1.12 Efficiency Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1.5 CBC (Cable Compensation)

The cable compensation pin is connected to a resistor to ground to program the amount of output voltage compensation needed to offset cable resistance. The cable compensation circuit generates a 0 to 3.13-V voltage level on the CBC pin corresponding to 0 A to IOCC maximum output current. The resistance selected on the CBC pin programs a current mirror that is summed into the VS feedback divider therefore increasing the regulation voltage as IOUT increases. There is an internal series resistance of 28 kΩ to the CBC pin which sets a maximum cable compensation for a 5-V output to approximately 400 mV when CBC is shorted to ground. The CBC resistance value can be determined using Equation 1.

Equation 1. GUID-B213C6AE-F14D-4141-A659-BF9942FA8C62-low.gif

where

  • VCBC(max) is the maximum voltage at the cable compensation pin at the maximum converter output current (see Section 6.5),
  • VOCV is the regulated output voltage,
  • VF is the diode forward voltage,
  • VVSR is the CV regulating level at the VS input (see Section 6.5),
  • VOCBC is the target cable compensation voltage at the output terminals.

Note that the cable compensation does not change the overvoltage protection (OVP) threshold, VOVP (see Section 6.5), so the operating margin to OVP is less when cable compensation is used.