SLUSDT2C August 2019 – December 2020 UCC28740-Q1
PRODUCTION DATA
The VS divider resistors determine the output overvoltage detection point of the flyback converter. The high-side divider resistor (RS1) determines the input-line voltage at which the controller enables continuous DRV operation. RS1 is determined based on transformer primary-to-auxiliary turns-ratio and desired input voltage operating threshold.
The low-side VS pin resistor is then selected based on the desired overvoltage limit, VOV.
The UCC28740-Q1 maintains tight constant-current regulation over varying input line by using the line-compensation feature. The line-compensation resistor (RLC) value is determined by current flowing in RS1 and the total internal gate-drive and external MOSFET turnoff delay. Assume an internal delay of 50 ns in the UCC28740-Q1.