SLUSBF3D July 2013 – March 2018 UCC28740
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
HIGH-VOLTAGE START UP | ||||||||
IHV | Start-up current out of VDD | VHV = 100 V, VVDD = 0 V, start state | 100 | 250 | 500 | µA | ||
IHVLKG25 | Leakage current at HV | VHV = 400 V, run state, TJ = 25°C | 0.01 | 0.5 | µA | |||
BIAS SUPPLY INPUT | ||||||||
IRUN | Supply current, run | IDRV = 0, run state | 2 | 2.65 | mA | |||
IWAIT | Supply current, wait | IDRV = 0, wait state | 95 | 125 | µA | |||
ISTART | Supply current, start | IDRV = 0, VVDD = 18 V, start state, IHV = 0 | 18 | 30 | µA | |||
IFAULT | Supply current, fault | IDRV = 0, fault state | 95 | 130 | µA | |||
UNDERVOLTAGE LOCKOUT | ||||||||
VVDD(on) | VDD turnon threshold | VVDD low to high | 19 | 21 | 23 | V | ||
VVDD(off) | VDD turnoff threshold | VVDD high to low | 7.35 | 7.75 | 8.15 | V | ||
VS INPUT | ||||||||
VVSNC | Negative clamp level | IVSLS = –300 µA, volts below ground | 190 | 250 | 325 | mV | ||
IVSB | Input bias current | VVS = 4 V | –0.25 | 0 | 0.25 | µA | ||
FB INPUT | ||||||||
IFBMAX | Full-range input current | fSW = fSW(min) | 16 | 23 | 30 | µA | ||
VFBMAX | Input voltage at full range | IFB = 25 µA, TJ = 25°C | 0.75 | 0.88 | 1 | V | ||
RFB | FB-input resistance, linearized | ΔIFB = 20 µA, centered at IFB = 15 µA, TJ = 25°C | 10 | 14 | 18 | kΩ | ||
CS INPUT | ||||||||
VCST(max) | Maximum CS threshold voltage | IFB = 0 µA(1) | 738 | 773 | 810 | mV | ||
VCST(min) | Minimum CS threshold voltage | IFB = 35 µA(1) | 170 | 194 | 215 | mV | ||
KAM | AM-control ratio | VCST(max) / VCST(min) | 3.6 | 4 | 4.45 | V/V | ||
VCCR | Constant-current regulation factor | 318 | 330 | 343 | mV | |||
KLC | Line-compensation current ratio | IVSLS = –300 µA, IVSLS / current out of CS pin | 24 | 25 | 28.6 | A/A | ||
tCSLEB | Leading-edge blanking time | DRV output duration, V CS = 1 V | 180 | 230 | 280 | ns | ||
DRIVERS | ||||||||
IDRS | DRV source current | VDRV = 8 V, VVDD = 9 V | 20 | 25 | mA | |||
RDRVLS | DRV low-side drive resistance | IDRV = 10 mA | 6 | 12 | Ω | |||
VDRCL | DRV clamp voltage | VVDD = 35 V | 14 | 16 | V | |||
RDRVSS | DRV pulldown in start-state | 150 | 190 | 230 | kΩ | |||
PROTECTION | ||||||||
VOVP | Overvoltage threshold | At VS input, TJ = 25°C(2) | 4.52 | 4.6 | 4.71 | V | ||
VOCP | Overcurrent threshold | At CS input | 1.4 | 1.5 | 1.6 | V | ||
IVSL(run) | VS line-sense run current | Current out of VS pin increasing | 190 | 225 | 275 | µA | ||
IVSL(stop) | VS line-sense stop current | Current out of VS pin decreasing | 70 | 80 | 100 | µA | ||
KVSL | VS line sense ratio | IVSL(run) / IVSL(stop) | 2.45 | 2.8 | 3.05 | A/A | ||
TJ(stop) | Thermal-shutdown temperature | Internal junction temperature | 165 | °C |