The PWMH pin controls the gate of an SR MOSFET through an external isolating gate-driver. PWMH may also be used to bias the primary-side of the gate-driver. The PWMH driver ground return is referenced to the AGND pin. The maximum voltage level of PWMH is clamped to 5-V REF level. As PWMH goes high, when its voltage is less than 3 V, up to 21-mA peak pull-up current may be supplied from the P13 regulator. When the PWMH voltage goes above 3 V, the pull-up is supplied from the REF regulator instead, so the peak driving capability is limited to less than 6 mA to avoid tripping the over-current protection of the REF regulator.

As shown in Figure 7-12, since the RUN driver charges the decoupling capacitor of a digital isolator first through one small-signal diode at the beginning of every burst cycle, the sourcing current of PWMH is sufficient to send the control signal to the isolator and supply the continuous isolator operating current together with the RUN driver at the same time through another small-signal diode. The high peak driving capability of PWMH provides the flexibility of signal transmission through a digitally isolated gate-driver with opto-compatible input.

It is prudent to choose an isolated gate-driver with minimal power-up delay on both input and output sides to avoid missing several PWMH pulses for SR control.

AGND pin is the ground return for all the analog control signals, RUN driver, and PWMH driver. It is required to implement a careful layout separation from other noisy ground return paths, such as PGND and power stage ground. The thermal pad should be connected to the AGND pin directly and could be a Kelvin connection point to the related external components. For details of the grounding layout guideline and noise decoupling techniques, one can refer to the Section 8.1 of this datasheet.