SLUSA12G December   2009  – November 2022 UCC28C40-Q1 , UCC28C41-Q1 , UCC28C42-Q1 , UCC28C43-Q1 , UCC28C44-Q1 , UCC28C45-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Detailed Pin Description
        1. 8.3.1.1 COMP
        2. 8.3.1.2 FB
        3. 8.3.1.3 CS
        4. 8.3.1.4 RT/CT
        5. 8.3.1.5 GND
        6. 8.3.1.6 OUT
        7. 8.3.1.7 VDD
        8. 8.3.1.8 VREF
      2. 8.3.2  Undervoltage Lockout
      3. 8.3.3  ±1% Internal Reference Voltage
      4. 8.3.4  Current Sense and Overcurrent Limit
      5. 8.3.5  Reduced-Discharge Current Variation
      6. 8.3.6  Oscillator Synchronization
      7. 8.3.7  Soft Start
      8. 8.3.8  Enable and Disable
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Voltage Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 UVLO Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  Input Bulk Capacitor and Minimum Bulk Voltage
        3. 9.2.2.3  Transformer Turns Ratio and Maximum Duty CycleG
        4. 9.2.2.4  Transformer Inductance and Peak Currents
        5. 9.2.2.5  Output Capacitor
        6. 9.2.2.6  Current Sensing Network
        7. 9.2.2.7  Gate Drive Resistor
        8. 9.2.2.8  VREF Capacitor
        9. 9.2.2.9  RT/CT
        10. 9.2.2.10 Start-Up Circuit
        11. 9.2.2.11 Voltage Feedback Compensation
          1. 9.2.2.11.1 Power Stage Poles and Zeroes
          2. 9.2.2.11.2 Slope Compensation
          3. 9.2.2.11.3 Open-Loop Gain
          4. 9.2.2.11.4 Compensation Loop
      3. 9.2.3 Application Curves
      4. 9.2.4 Power Supply Recommendations
      5. 9.2.5 Layout
        1. 9.2.5.1 Layout Guidelines
          1. 9.2.5.1.1 Precautions
          2. 9.2.5.1.2 Feedback Traces
          3. 9.2.5.1.3 Bypass Capacitors
          4. 9.2.5.1.4 Compensation Components
          5. 9.2.5.1.5 Traces and Ground Planes
        2. 9.2.5.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Related Links
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2.3 Transformer Turns Ratio and Maximum Duty CycleG

The transformer design starts with selecting a suitable switching frequency for the given application. The UCC28C42 is capable of switching up to 1 MHz but considerations such as overall converter size, switching losses, core loss, system compatibility, and interference with communication frequency bands generally determine an optimum frequency that should be used. For this off-line converter, the switching frequency (fSW) is selected to be 110 kHz as a compromise to minimize the transformer size and the EMI filter size, and still have acceptable losses.

The transformer primary to secondary turns ratio (NPS) can be selected based on the desired MOSFET voltage rating and the secondary diode voltage rating. Because the maximum input voltage is 265 VRMS, the peak bulk input voltage can be calculated as shown in Equation 4.

Equation 4. GUID-8B695D83-1A31-4469-B277-E9EB5DD1BE39-low.gif

To minimize the cost of the system, a readily available 650V MOSFET is selected. Derating the maximum voltage stress on the drain to 80% of its rated value and allowing for a leakage inductance voltage spike of up to 30% of the maximum bulk input voltage, the reflected output voltage must be less than 130 V as shown in Equation 5.

Equation 5. GUID-A9735D8A-1CDE-43D9-84B8-60E0CB8FBFFD-low.gif

The maximum primary to secondary transformer turns ratio (NPS) for a 12 V output can be selected as

Equation 6. GUID-7AE8C9E5-7B2B-415E-95BB-E314D6B447F5-low.gif

A turns ratio of NPS = 10 is used in the design example.

The auxiliary winding is used to supply bias voltage to the UCC28C42-Q1. Maintaining the bias voltage above the VDD minimum operating voltage after turnon is required for stable operation. The minimum VDD operating voltage for the UCC28C42-Q1 version of the controller is 10 V. The auxiliary winding is selected to support a 12 V bias voltage so that it is above the minimum operating level but still keeps the losses low in the IC. The primary to auxiliary turns ratio (NPA) can be calculated from Equation 7:

Equation 7. GUID-2537D124-E22D-4D76-810F-1F22B6B90D86-low.gif

The output diode experiences a voltage stress that is equal to the output voltage plus the reflected input voltage:

Equation 8. GUID-0DD1BE30-9152-479D-8666-327577205C8C-low.gif

TI recommends a Schottky diode with a rated blocking voltage greater than 60 V to allow for voltage spikes due to ringing. The forward voltage drop (VF) of this diode is estimated to be equal to 0.6 V

To avoid high peak currents, the flyback converter in this design operates in continuous conduction mode. Once NPS is determined, the maximum duty cycle (DMAX) can be calculated using the transfer function for a CCM flyback converter:

Equation 9. GUID-32317E63-9BD6-4588-A77F-FA259AFB3F2D-low.gif
Equation 10. GUID-E9C11B71-8074-416E-9E50-A35F8ABC4E6C-low.gif

Because the maximum duty cycle exceeds 50%, and the design is an off-line (AC-input) application, the UCC28C42-Q1 is best suited for this application.