SLUSFI2 December 2024 UCC33020-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PIN | TYPE (1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
EN/FLT | 1 | I/O |
Multi-function Enable input pin and fault output pin. Connect to microcontroller through an 18kΩ or greater pull-up resistor. Enable input pin: Forcing EN low disables the device. Pull high to enable normal device functionality. Fault output pin: This pin is pulled low for 200μs to alert that power converter is shutdown due to fault conditions. |
VINP | 2 | P | Primary side input supply voltage pin. 15nF (CIN1) and 10μF (CIN2) ceramic bypass capacitors placed close to device pins are required between VINP and GNDP pins. |
GNDP | 3 | G | Power ground return connection for VINP. |
4 | |||
5 | |||
6 | |||
SEL | 7 | I | VCC selection pin. VCC setpoint is 5.0V when SEL is connected to VCC, and 5.5V when SEL is shorted to GNDS. |
VCC | 8 | P | Isolated supply output voltage pin. 15nF (COUT1) and 22μF (COUT2) ceramic bypass capacitors placed close to device pins are required between VCC and GNDS pins. |
GNDS | 9 | G | Power ground return connection for VCC. |
10 | |||
11 | |||
12 |