SLUSFK5 June   2024 UCC33410

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Insulation Specifications
    6. 5.6 Safety-Related Certifications
    7. 5.7 Electrical Characteristics
    8. 5.8 External BOM Components
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable and Disable
      2. 6.3.2 Output Voltage Soft-Start and Steady-State Regulation
      3. 6.3.3 Protection Features
        1. 6.3.3.1 Input Under-voltage and Over-Voltage Lockout
        2. 6.3.3.2 Output Under-Voltage Protection
        3. 6.3.3.3 Output Over-Voltage Protection
        4. 6.3.3.4 Over-Temperature Protection
        5. 6.3.3.5 Fault Reporting and Auto-Restart
      4. 6.3.4 VCC Output Voltage Selection
      5. 6.3.5 VCC Load Recommended Operating Area
      6. 6.3.6 Electromagnetic Compatibility (EMC) Considerations
    4. 6.4 Device Functional Modes
    5. 6.5 Pre-Production Samples Operating Limits
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical and Packaging Information

Package Options

Mechanical Data (Package|Pins)
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Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

The UCC33410 integrated isolated power solution simplifies system design and reduces board area usage. Proper PCB layout is important in order to achieve optimum performance. Here is a list of recommendations:

  • Place decoupling capacitors as close as possible to the device pins. For the input supply, place 0402 and 0805 ceramic capacitor between pin 2 (VINP) and pins 3, 4, 5 and 6 (GNDP). For the isolated output supply, place 0402 and 0805 ceramaic capacitora between pin 8 (VCC) and pins 9, 10, 11 and 12 (GNDS). This location is of particular importance to the input decoupling capacitor, because this capacitor supplies the transient current associated with the fast switching waveforms of the power drive circuits.
  • Because the device does not have a thermal pad for heat-sinking, the device dissipates heat through the respective GND pins. Ensure that enough copper (preferably a connection to the ground plane) is present on all GNDP and GNDS pins for best heat-sinking. Placing vias close to the device pins and away from the high frequency path between the ceramic capacitors and the device pins is essential for better thermal performance.
  • If space and layer count allow, it is also recommended to connect the VINP, GNDP, VCC and GNDS pins to internal ground or power planes through multiple vias of adequate size. Alternatively, make traces for these nets as wide as possible to minimize losses.
  • Pay close attention to the spacing between primary ground plane (GNDP) and secondary ground plane (GNDS) on the PCB outer layers. The effective creepage and or clearance of the system reduces if the two ground planes have a lower spacing than that of the device package.
  • To ensure isolation performance between the primary and secondary side, avoid placing any PCB traces or copper below the UCC33410 device on the outer copper layers.