SLUSFK1D January   2024  – June 2024 UCC33420

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Insulation Specifications
    6. 5.6 Safety-Related Certifications
    7. 5.7 Electrical Characteristics
    8. 5.8 External BOM Components
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable and Disable
      2. 6.3.2 Output Voltage Soft-Start and Steady-State Regulation
      3. 6.3.3 Protection Features
        1. 6.3.3.1 Input Under-voltage and Over-Voltage Lockout
        2. 6.3.3.2 Output Under-Voltage Protection
        3. 6.3.3.3 Output Over-Voltage Protection
        4. 6.3.3.4 Over-Temperature Protection
        5. 6.3.3.5 Fault Reporting and Auto-Restart
      4. 6.3.4 VCC Output Voltage Selection
      5. 6.3.5 VCC Load Recommended Operating Area
      6. 6.3.6 Electromagnetic Compatibility (EMC) Considerations
    4. 6.4 Device Functional Modes
    5. 6.5 Pre-Production Samples Operating Limits
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical and Packaging Information

Package Options

Mechanical Data (Package|Pins)
  • RAQ|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Output Voltage Soft-Start and Steady-State Regulation

The UCC33420 has soft-start mechanism that ensures a smooth and fast soft-start operation with minimum input inrush current. The output voltage Soft-Start diagram is shown in Figure 6-1. After VINP > VVINP_UVLO_R and EN/FLT is pulled high, the soft-start sequence starts with a primary duty cycle open loop control. The power stage operates with a fixed burst frequency with an incremental increasing duty cycle starting at 6.5% . The rate of change of the duty cycle is pre-programmed in the part to reduce the input inrush current while building the output voltage VCC. The primary side limits the maximum duty cycle during this phase till the secondary side VCC voltage passes a certain threshold before releasing this duty cycle limit. This limit will ensure minimum input current in case the device starts on a short circuit and the VCC is not building up. Once the VCC reaches the regulation range, the duty cycle is no longer determined from the primary side controller but instead VCC hysteritic control is active to tightly regulate the output voltage within the defined hysterisis bands to reduce the output voltage ripple.

The soft-start time will vary depending on the output capacitors and loading conditions. During VCC regulation state, the burst frequency will change according to the output capacitors and loading conditions. The burst frequency will be highest at higher loading conditions and lowest at light loading conditions by which light load efficiency improvments can be achieved.

UCC33420 Output Voltage Soft-Start
          Diagram Figure 6-1 Output Voltage Soft-Start Diagram