SLUSFK1D January   2024  – June 2024 UCC33420

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Insulation Specifications
    6. 5.6 Safety-Related Certifications
    7. 5.7 Electrical Characteristics
    8. 5.8 External BOM Components
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable and Disable
      2. 6.3.2 Output Voltage Soft-Start and Steady-State Regulation
      3. 6.3.3 Protection Features
        1. 6.3.3.1 Input Under-voltage and Over-Voltage Lockout
        2. 6.3.3.2 Output Under-Voltage Protection
        3. 6.3.3.3 Output Over-Voltage Protection
        4. 6.3.3.4 Over-Temperature Protection
        5. 6.3.3.5 Fault Reporting and Auto-Restart
      4. 6.3.4 VCC Output Voltage Selection
      5. 6.3.5 VCC Load Recommended Operating Area
      6. 6.3.6 Electromagnetic Compatibility (EMC) Considerations
    4. 6.4 Device Functional Modes
    5. 6.5 Pre-Production Samples Operating Limits
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical and Packaging Information

Package Options

Mechanical Data (Package|Pins)
  • RAQ|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT
CLR External clearance (1) Shortest terminal-to-terminal distance through air > 4.1 mm
CPG External creepage (1) Shortest terminal-to-terminal distance across the package surface > 4.1 mm
DTI Distance through the insulation Minimum internal gap (internal clearance) > 50 µm
CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 > 600 V
Material group According to IEC 60664-1 I
Overvoltage category Rated mains voltage ≤ 300VRMS I-IV
Rated mains voltage ≤ 600VRMS I-IV
Rated mains voltage ≤ 1000VRMS I-III
DIN EN IEC60747-17 (VDE 0884-17) (2)
VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 1159 VPK
VIOWM Maximum working isolation voltage AC voltage (sine wave) Time dependent dielectric breakdown (TDDB) test 820 VRMS
DC voltage 1159 VDC
VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60s (qualification) 4243 VPK
VTEST = 1.2 × VIOTM , t = 1s (100%) production 5091 VPK
VIMP Impulse Voltage (3) Tested in air, 1.2/50µs waveform per IEC 62368-1 5000 VPK
VIOSM Maximum surge isolation voltage (4) Tested in oil (qualification test),
1.2/50µs waveform per IEC 62368-1.		 6500 VPK
qpd Apparent charge (5) Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60s; Vpd(m) = 1.2 × VIORM, tm = 10s ≤ 5 pC
Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60s; Vpd(m) = 1.3 × VIORM, tm = 10s ≤ 5 pC
Method b1: At routine test (100% production) and preconditioning (type test), Vini = 1.2 x VIOTM, tini = 1s; Vpd(m) = 1.5 × VIORM, tm = 1s ≤ 5 pC
CIO Barrier capacitance, input to output (6) VIO = 0.4 sin (2πft), f = 1MHz < 3 pF
RIO Isolation resistance, input to output (6) VIO = 500V, TA = 25°C > 1012 Ω
VIO = 500V, 100°C ≤ TA ≤ 125°C > 1011 Ω
VIO = 500V at TS = 150°C > 109 Ω
Pollution degree 2
Climatic category 40/125/21
UL 1577
VISO Withstand isolation voltage Withstand isolation voltage
VTEST = VISO , t = 60s (qualification)
VTEST = 1.2 × VISO , t=1s (100% production)		 3000 VRMS
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these specifications.
(2) This coupler is suitable for basic electrical insulation only within the maximum operating ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Testing is carried out in air to determine the surge immunity of the package.
(4) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier
(5) Apparent charge is electrical discharge caused by a partial discharge (pd).
(6) All pins on each side of the barrier tied together creating a two-terminal device