SLUS395K February   2000  – October 2015 UCC2817 , UCC2818 , UCC3817 , UCC3818

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Reference Section and Error Amplifier
      2. 7.3.2 Zero Power Block
      3. 7.3.3 Multiplier
      4. 7.3.4 Output Overvoltage Protection
      5. 7.3.5 Pin Descriptions
        1. 7.3.5.1  CAI
        2. 7.3.5.2  CAOUT
        3. 7.3.5.3  CT
        4. 7.3.5.4  DRVOUT
        5. 7.3.5.5  GND
        6. 7.3.5.6  IAC
        7. 7.3.5.7  MOUT
        8. 7.3.5.8  OVP/EN
        9. 7.3.5.9  PKLMT
        10. 7.3.5.10 RT
        11. 7.3.5.11 SS
        12. 7.3.5.12 VAOUT
        13. 7.3.5.13 VCC
        14. 7.3.5.14 VFF
        15. 7.3.5.15 VSENSE
        16. 7.3.5.16 VREF
    4. 7.4 Device Functional Modes
      1. 7.4.1 Transition Mode Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Stage
          1. 8.2.2.1.1 LBOOST
          2. 8.2.2.1.2 COUT
        2. 8.2.2.2 Softstart
        3. 8.2.2.3 Multiplier
        4. 8.2.2.4 Voltage Loop
        5. 8.2.2.5 Current Loop
        6. 8.2.2.6 Start Up
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Switch Selection
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Capacitor Ripple Reduction
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DW|16
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

9.1 Power Switch Selection

As in any power supply design, tradeoffs between performance, cost, and size must be made. When selecting a power switch, calculate the total power dissipation in the switch for several different devices at the switching frequencies being considered for the converter. Total power dissipation in the switch is the sum of switching loss and conduction loss. Switching losses are the combination of the gate charge loss, COSS loss and turnon and turnoff losses:

Equation 28. PGATE = QGATE × VGATE × fS
Equation 29. PCOSS = 1/2 × COSS × V2OFF × fS
Equation 30. PON + POFF = 1/2 × VOFF × IL × (tON + tOFF) × fS

where

  • QGATE is the total gate charge
  • VGATE is the gate drive voltage
  • fS is the clock frequency
  • COSS is the drain source capacitance of the MOSFET
  • IL is the peak inductor current
  • tON and tOFF are the switching times (estimated using device parameters RGATE, QGD and VTH)
  • VOFF is the voltage across the switch during the off time; in this case VOFF = VOUT

Conduction loss is calculated as the product of the RDS(on) of the switch (at the worst case junction temperature) and the square of RMS current:

Equation 31. PCOND = RDS(on) × K × I2RMS

where

  • K is the temperature factor found in the manufacturer’s RDS(on) vs. junction temperature curves

Calculating these losses and plotting against frequency gives a curve that enables the designer to determine either which device has the best performance at the desired switching frequency, or which switching frequency has the least total loss for a particular power switch. For the design example in Figure 9, an IRFP450 HEXFET from International Rectifier was chosen because of its low RDS(on) and its VDSS rating. The IRFP450 RDS(on) of 0.4 Ω and the maximum VDSS of 500 V made it an ideal choice. An excellent review of this procedure can be found in the Unitrode Power Supply Design Seminar SEM1200, Topic 6, Design Review: 140 W, [Multiple Output High Density DC/DC Converter].