SLUS458I July   2000  – June 2024 UCC28C40 , UCC28C41 , UCC28C42 , UCC28C43 , UCC28C44 , UCC28C45 , UCC38C40 , UCC38C41 , UCC38C42 , UCC38C43 , UCC38C44 , UCC38C45

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Detailed Pin Description
        1. 7.3.1.1 COMP
        2. 7.3.1.2 FB
        3. 7.3.1.3 CS
        4. 7.3.1.4 RT/CT
        5. 7.3.1.5 GND
        6. 7.3.1.6 OUT
        7. 7.3.1.7 VDD
        8. 7.3.1.8 VREF
      2. 7.3.2  Undervoltage Lockout
      3. 7.3.3  ±1% Internal Reference Voltage
      4. 7.3.4  Current Sense and Overcurrent Limit
      5. 7.3.5  Reduced-Discharge Current Variation
      6. 7.3.6  Oscillator Synchronization
      7. 7.3.7  Soft-Start Timing
      8. 7.3.8  Enable and Disable
      9. 7.3.9  Slope Compensation
      10. 7.3.10 Voltage Mode
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 UVLO Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Input Bulk Capacitor and Minimum Bulk Voltage
        2. 8.2.2.2  Transformer Turns Ratio and Maximum Duty Cycle
        3. 8.2.2.3  Transformer Inductance and Peak Currents
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Current Sensing Network
        6. 8.2.2.6  Gate Drive Resistor
        7. 8.2.2.7  VREF Capacitor
        8. 8.2.2.8  RT/CT
        9. 8.2.2.9  Start-Up Circuit
        10. 8.2.2.10 Voltage Feedback Compensation
          1. 8.2.2.10.1 Power Stage Poles and Zeroes
          2. 8.2.2.10.2 Slope Compensation
          3. 8.2.2.10.3 Open-Loop Gain
          4. 8.2.2.10.4 Compensation Loop
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Precautions
        2. 8.4.1.2 Feedback Traces
        3. 8.4.1.3 Bypass Capacitors
        4. 8.4.1.4 Compensation Components
        5. 8.4.1.5 Traces and Ground Planes
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.2 Transformer Turns Ratio and Maximum Duty Cycle

The transformer design begins with selecting a suitable switching frequency for the given application. The UCC28C42 is capable of switching up to 1MHz but considerations such as overall converter size, switching losses, core loss, system compatibility, and interference with communication frequency bands generally determine an optimum frequency that should be used. For this off-line converter, the switching frequency (fSW) is selected to be 110kHz as a compromise to minimize the transformer size and the EMI filter size, and still have acceptable losses.

The transformer primary to secondary turns ratio (NPS) can be selected based on the desired MOSFET voltage rating and the secondary diode voltage rating. Because the maximum input voltage is 265VRMS, the peak bulk input voltage can be calculated as shown in Equation 4.

Equation 4. UCC28C40 UCC28C41 UCC28C42 UCC28C43 UCC28C44 UCC28C45 UCC38C40 UCC38C41 UCC38C42 UCC38C43 UCC38C44 UCC38C45

To minimize the cost of the system, a readily available 650V MOSFET is selected. Derating the maximum voltage stress on the drain to 80% of its rated value and allowing for a leakage inductance voltage spike of up to 30% of the maximum bulk input voltage, the reflected output voltage must be less than 130V as shown in Equation 5.

Equation 5. UCC28C40 UCC28C41 UCC28C42 UCC28C43 UCC28C44 UCC28C45 UCC38C40 UCC38C41 UCC38C42 UCC38C43 UCC38C44 UCC38C45

The maximum primary to secondary transformer turns ratio (NPS) for a 12V output can be selected as

Equation 6. UCC28C40 UCC28C41 UCC28C42 UCC28C43 UCC28C44 UCC28C45 UCC38C40 UCC38C41 UCC38C42 UCC38C43 UCC38C44 UCC38C45

A turns ratio of NPS = 10 is used in the design example.

The auxiliary winding is used to supply bias voltage to the controller. Maintaining the bias voltage above the VDD minimum operating voltage after turnon is required for stable operation. The minimum VDD operating voltage for the controller selected for this design is 10V. The auxiliary winding is selected to support a 12V bias voltage so that it is above the minimum operating level but maintains a low level of losses in the IC. The primary to auxiliary turns ratio (NPA) can be calculated from Equation 7:

Equation 7. UCC28C40 UCC28C41 UCC28C42 UCC28C43 UCC28C44 UCC28C45 UCC38C40 UCC38C41 UCC38C42 UCC38C43 UCC38C44 UCC38C45

The output diode experiences a voltage stress that is equal to the output voltage plus the reflected input voltage:

Equation 8. UCC28C40 UCC28C41 UCC28C42 UCC28C43 UCC28C44 UCC28C45 UCC38C40 UCC38C41 UCC38C42 UCC38C43 UCC38C44 UCC38C45

TI recommends a Schottky diode with a rated blocking voltage greater than 60V to allow for voltage spikes due to ringing. The forward voltage drop (VF) of this diode is estimated to be equal to 0.6V

To avoid high peak currents, the flyback converter in this design operates in continuous conduction mode. Once NPS is determined, the maximum duty cycle (DMAX) can be calculated using the transfer function for a CCM flyback converter:

Equation 9. UCC28C40 UCC28C41 UCC28C42 UCC28C43 UCC28C44 UCC28C45 UCC38C40 UCC38C41 UCC38C42 UCC38C43 UCC38C44 UCC38C45
Equation 10. UCC28C40 UCC28C41 UCC28C42 UCC28C43 UCC28C44 UCC28C45 UCC38C40 UCC38C41 UCC38C42 UCC38C43 UCC38C44 UCC38C45

Because the maximum duty cycle exceeds 50%, and the design is an off-line (AC-input) application, the UCC28C42 is best suited for this application.