SLUSER8C June   2022  – March 2023 UCC28C50 , UCC28C51 , UCC28C52 , UCC28C53 , UCC28C54 , UCC28C55 , UCC28C56H , UCC28C56L , UCC28C57H , UCC28C57L , UCC28C58 , UCC28C59 , UCC38C50 , UCC38C51 , UCC38C52 , UCC38C53 , UCC38C54 , UCC38C55

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Detailed Pin Description
        1. 8.3.1.1 COMP
        2. 8.3.1.2 FB
        3. 8.3.1.3 CS
        4. 8.3.1.4 RT/CT
        5. 8.3.1.5 GND
        6. 8.3.1.6 OUT
        7. 8.3.1.7 VDD
        8. 8.3.1.8 VREF
      2. 8.3.2  Undervoltage Lockout
      3. 8.3.3  ±1% Internal Reference Voltage
      4. 8.3.4  Current Sense and Overcurrent Limit
      5. 8.3.5  Reduced-Discharge Current Variation
      6. 8.3.6  Oscillator Synchronization
      7. 8.3.7  Soft-Start Timing
      8. 8.3.8  Enable and Disable
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Voltage Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 UVLO Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Input Bulk Capacitor and Minimum Bulk Voltage
        2. 9.2.2.2  Transformer Turns Ratio and Maximum Duty Cycle
        3. 9.2.2.3  Transformer Inductance and Peak Currents
        4. 9.2.2.4  Output Capacitor
        5. 9.2.2.5  Current Sensing Network
        6. 9.2.2.6  Gate Drive Resistor
        7. 9.2.2.7  VREF Capacitor
        8. 9.2.2.8  RT/CT
        9. 9.2.2.9  Start-Up Circuit
        10. 9.2.2.10 Voltage Feedback Compensation
          1. 9.2.2.10.1 Power Stage Poles and Zeroes
          2. 9.2.2.10.2 Slope Compensation
          3. 9.2.2.10.3 Open-Loop Gain
          4. 9.2.2.10.4 Compensation Loop
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Precautions
        2. 9.4.1.2 Feedback Traces
        3. 9.4.1.3 Bypass Capacitors
        4. 9.4.1.4 Compensation Components
        5. 9.4.1.5 Traces and Ground Planes
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.2 Undervoltage Lockout

Six sets of UVLO thresholds are available with turn-on and turnoff thresholds of: (14.5 V and 9 V), (8.4 V and 7.6 V), (7 V and 6.6 V), (18.8 V and 15.5 V), (18.8 V and 14.5V) and (16 V and 12.5V), respectively. The first set is primarily intended for off-line and 48-V distributed power applications, where the wider hysteresis allows for lower frequency operation and longer soft-starting time of the converter. The second set of UVLO option is ideal for high frequency DC-DC converters typically running from a 12-VDC input. The third set is for battery powered and portable applications. The fourth to sixth UVLO sets are suitable to drive SiC MOSFETs in high voltage applications. Table 8-2 shows the maximum duty cycle and UVLO thresholds by device.

Table 8-2 UVLO Options
MAXIMUM
DUTY CYCLE (%)		 UVLO ON
(V)		 UVLO OFF
(V)		 DEVICE
NUMBER
100 14.5 9 UCCx8C52
100 8.4 7.6 UCCx8C53
100 7 6.6 UCCx8C50
100 18.8 15.5

UCC28C56H
100 18.8 14.5 UCC28C56L
100 16 12.5 UCC28C58
50 14.5 9 UCCx8C54
50 8.4 7.6 UCCx8C55
50 7 6.6 UCCx8C51
50 18.8 15.5 UCC28C57H
50 18.8 14.5 UCC28C57L
50 16 12.5 UCC28C59

During UVLO the IC draws less than 75 µA of supply current. Once crossing the turnon threshold the IC supply current increases to a maximum of 2mA, typically 1.3 mA. This low start-up current allows the power supply designer to optimize the selection of the startup resistor value to provide a more efficient design. In applications where low component cost overrides maximum efficiency, the low run current of 1.3 mA (typical) allows the control device to run directly through the single resistor to (+) rail, rather than requiring a bootstrap winding on the power transformer, along with a rectifier. The start and run resistor for this case must also pass enough current to allow driving the primary switching MOSFET, which may be a few milliamps in small devices.

GUID-20220403-SS0I-ZSFS-Z1FL-RRM5S4R43BZB-low.svg Figure 8-2 UVLO ON and OFF Profile