SLUSDR3B
June 2019 – February 2024
UCC5390-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Function
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Power Ratings
5.6
Insulation Specifications for DWV Package
5.7
Safety-Related Certifications For DWV Package
5.8
Safety Limiting Values
5.9
Electrical Characteristics
5.10
Switching Characteristics
5.11
Insulation Characteristics Curves
5.12
Typical Characteristics
6
Parameter Measurement Information
6.1
Propagation Delay, Inverting, and Noninverting Configuration
6.1.1
CMTI Testing
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Power Supply
7.3.2
Input Stage
7.3.3
Output Stage
7.3.4
Protection Features
7.3.4.1
Undervoltage Lockout (UVLO)
7.3.4.2
Active Pulldown
7.3.4.3
Short-Circuit Clamping
7.4
Device Functional Modes
7.4.1
ESD Structure
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Designing IN+ and IN– Input Filter
8.2.2.2
Gate-Driver Output Resistor
8.2.2.3
Estimate Gate-Driver Power Loss
8.2.2.4
Estimating Junction Temperature
8.2.3
Selecting VCC1 and VCC2 Capacitors
8.2.3.1
Selecting a VCC1 Capacitor
8.2.3.2
Selecting a VCC2 Capacitor
8.2.3.3
Application Circuits With Output Stage Negative Bias
8.2.4
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
PCB Material
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Certifications
11.4
Receiving Notification of Documentation Updates
11.5
Support Resources
11.6
Trademarks
11.7
Electrostatic Discharge Caution
11.8
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DWV|8
MPDS382B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slusdr3b_oa
slusdr3b_pm
5.11
Insulation Characteristics Curves
Figure 5-1
Thermal Derating Curve for Limiting Current per VDE for DWV Package
Figure 5-2
Thermal Derating Curve for Limiting Power per VDE for DWV Package