8.4.2 GPI Configuration

Up to 32 of the 84 GPIO pins of the UCD90320U device can be configured as GPI. The GPI configuration window is under the Pin Assignment tab. Figure 11 shows an example.

Figure 11. GPI Configuration Window (Hard Configuration ► Monitors and GPIO Pins Assignment)

The polarity of GPI pins can be configured to be either active high or active low. Each GPI can be used as a source of sequence dependency. (See also the Rail Sequence Configuration section). The GPI pins can be also used for cascading function. (See also the Cascading Multiple Devices section). The first defined 3 GPIs regardless of their main purpose are assigned to the pin selected states function. (See also the Pin Selected Rail States Configuration section).

In addition hard configuration functions, four special behaviors can be assigned to each GPI pin using the dropdown window shown in Figure 12:

• GPI Fault The de-assertion of this pin is treated as a fault, which can trigger shut-down actions for any voltage rails. (See also the Fault Responses Configuration section).
• Latched Statuses Clear Source This pin can be used to clear latched-type statuses (_LATCH). (See also the GPO Configuration section).
• Input Source for Margin Enable When this pin is asserted, all rails with margining enabled enter into a margined state (low or high). This special behavior can be assigned to only one GPI.
• Input Source for Margin Low and Not-High When this pin is asserted, all margined rails are set to Margin Low as long as the Margin Enable is asserted. When this pin is de-asserted the rails are set to Margin High as long as the Margin Enable is asserted. This special behavior can be assigned to only one GPI.
• Configured as Debug Pin When the pin is asserted, the device does not alert the PMBALERT pin, and neither responds to, nor logs any faults as defined in Table 2. The device ignores the rail sequence ON and OFF dependency conditions. As soon as the sequence ON and OFF timeout expires, the rails are sequenced ON or OFF accordingly regardless of the timeout action. If the sequence ON or OFF timeout value is set to 0, the rails are sequenced ON or OFF immediately. The fault pins do not pull the fault bus low. LGPOs affected by these events return to the original states.
• Configured as Fault Pin GPI fault enable functionality must be set to enable this feature. When set, if there is no fault on a fault bus. The FAULT pin is digital input pin and it monitors the fault bus. When one or more UCD90329 devices detect a rail fault, the corresponding FAULT pin is turned into active driven low state, pulling down the fault bus voltage and informing all other UCD90320U devices of the corresponding fault. This behavior allows a coordinated action to be taken across multiple devices. After the fault is cleared, the state of the FAULT pin reverts to that of an input pin.(See also the Cascading Multiple Devices section).

Figure 12. GPI Configuration Dropdown Window
(Hardware Configuration ► Monitor and GPIO Pins Assignment)