SLVSA30D April 2011 – March 2019 UCD9090
PRODUCTION DATA.
The UCD9090 has an integrated power-on reset (POR) circuit which monitors the supply voltage, V33D. When the device powers-up, the POR circuit detects the supply voltage rise. When V33D is greater than VRESET, the device comes out of reset.
The device can be forced into a reset state by an external circuit connected to the RESET pin (this is considered a hard reset) while the device is operating within the recommended supply voltage range. A voltage less than the low-level input voltage (VIL) threshold for longer than the tRESET period holds the device in the reset state. The device exits the reset state within 1 ms after the RESET pin releases and rises to a voltage greater than the high-level input voltage (VIH) threshold. To avoid an erroneous trigger caused by noise, connect a 10-kΩ pullup resistor between the RESET pin and the 3.3-V supply. Connect a 1000-pF capacitor between the RESET pin and ground.
Any time the device exits the reset state, it begins an initialization routine that lasts approximately 20 ms. During this initialization period, the FPWM pins are held low, and all other GPIO and GPI pins are in an open-circuit state. At the end of the initialization period, the device begins normal operation as defined by the device configuration.