SLVSDD7B August   2016  – March 2022 UCD9090A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C/Smbus/PMBus Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 TI Fusion GUI
      2. 7.3.2 PMBus Interface
      3. 7.3.3 Rail Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1  Power Supply Sequencing
        1. 7.4.1.1 Turn-On Sequencing
        2. 7.4.1.2 Turn-Off Sequencing
        3. 7.4.1.3 Sequencing Configuration Options
      2. 7.4.2  Pin-Selected Rail States
      3. 7.4.3  Monitoring
        1. 7.4.3.1 Voltage Monitoring
        2. 7.4.3.2 Current Monitoring
        3. 7.4.3.3 Remote Temperature Monitoring and Internal Temperature Sensor
        4. 7.4.3.4 Temperature by Host Input
      4. 7.4.4  Fault Responses and Alert Processing
      5. 7.4.5  Shut Down All Rails and Sequence On (Resequence)
      6. 7.4.6  GPIOs
      7. 7.4.7  GPO Control
      8. 7.4.8  GPO Dependencies
        1. 7.4.8.1 GPO Delays
        2. 7.4.8.2 State Machine Mode Enable
      9. 7.4.9  GPI Special Functions
        1. 7.4.9.1 Fault Shutdown Rails
        2. 7.4.9.2 Configured as Sequencing Debug Pin
        3. 7.4.9.3 Configured as Fault Pin
        4. 7.4.9.4 Cold Boot Mode Enable
      10. 7.4.10 Power Supply Enables
      11. 7.4.11 Cascading Multiple Devices
      12. 7.4.12 PWM Outputs
        1. 7.4.12.1 FPWM1-8
        2. 7.4.12.2 PWM1-2
      13. 7.4.13 Programmable Multiphase PWMs
      14. 7.4.14 Margining
        1. 7.4.14.1 Open-Loop Margining
        2. 7.4.14.2 Closed-Loop Margining
      15. 7.4.15 Run Time Clock
      16. 7.4.16 System Reset Signal
      17. 7.4.17 Watch Dog Timer
      18. 7.4.18 Data and Error Logging to Flash Memory
      19. 7.4.19 Brownout Function
      20. 7.4.20 PMBus Address Selection
      21. 7.4.21 Device Reset
      22. 7.4.22 JTAG Interface
      23. 7.4.23 Internal Fault Management and Memory Error Correction (ECC)
    5. 7.5 Programming
      1. 7.5.1 Full Configuration Update While in Normal Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Estimating ADC Reporting Accuracy
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGZ|48
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY CURRENT
IV33ASupply current(1)VV33A = 3.3 V8mA
IV33DIOVV33DIO = 3.3 V2mA
IV33DVV33D = 3.3 V40mA
IV33DVV33D = 3.3 V, storing configuration parameters in flash memory50mA
ANALOG INPUTS (MON1–MON11)
VMONInput voltage rangeMON1–MON1002.5V
MON110.22.5V
INLADC integral non-linearity–44LSB
DNLADC differential non-linearity-22LSB
IlkgInput leakage current3 V applied to pin100nA
IOFFSETInput offset current1-kΩ source impedance–55μA
RINInput impedanceMON1–MON10, ground reference8MΩ
MON11, ground reference0.51.53MΩ
CINInput capacitance10pF
tCONVERTADC sample period12 voltages sampled, 3.89 μs/sample400μs
VREFADC 2.5 V, internal reference accuracy0°C ≤ TA ≤ 125°C–0.5%0.5%
–40°C ≤ TA ≤ 125°C–1%1%
ANALOG INPUT (PMBus_ADDRx)
IBIASBias current for PMBus Addr pins911μA
VADDR_OPENVoltage – open pinPMBus_ADDR0, PMBus_ADDR1 open2.26V
VADDR_SHORTVoltage – shorted pinPMBus_ADDR0, PMBus_ADDR1 short to ground0.124V
DIGITAL INPUTS AND OUTPUTS
VOLLow-level output voltageIOL = 6 mA(2), V33DIO = 3 VDgnd + 0.25V
VOHHigh-level output voltageIOH = –6 mA(3), V33DIO = 3 VV33DIO
– 0.6		V
VIHHigh-level input voltageV33DIO = 3 V2.13.6V
VILLow-level input voltageV33DIO = 3.5 V1.4V
MARGINING OUTPUTS
TPWM_FREQMARGINING-PWM frequencyFPWM1-815.260125000kHz
PWM1-20.0017800
DUTYPWMMARGINING-PWM duty cycle range0%100%
SYSTEM PERFORMANCE
VDDSlewMinimum VDD slew rateVDD slew rate between 2.3 V and 2.9 V0.25V/ms
VRESETSupply voltage at which device comes out of resetFor power-on reset (POR)2.4V
tRESETLow-pulse duration needed at RESET pinTo reset device during normal operation2μS
f(PCLK)Internal oscillator frequency TA = 25°C240250260MHz
tretentionRetention of configuration parametersTJ = 25°C100Years
Write_CyclesNumber of nonvolatile erase/write cyclesTJ = 25°C20K cycles
(1) Typical supply current values are based on device programmed but not configured, and no peripherals connected to any pins.
(2) The maximum total current, IOLmax, for all outputs combined, should not exceed 12 mA to hold the maximum voltage drop specified.
(3) The maximum total current, IOHmax, for all outputs combined, should not exceed 48 mA to hold the maximum voltage drop specified.