SLVSC86A January 2014 – March 2014 UCD9244-EP
PRODUCTION DATA.
Figure 17 shows the UCD9244 power supply controller as part of a system that provides the regulation of two independent power supplies. The loop for each power supply is created by the respective voltage outputs feeding into the differential voltage error ADC (EADC) inputs, and completed by DPWM outputs feeding into the gate drivers for each power stage.
The ±Vsense rail signals must be routed to the EAp/EAn input that matches the DPWM number that controls the output power stage. For example, the power stage driven by DPWM1A must have its feedback routed to EAP1 and EAN1.