SLVSC86A January 2014 – March 2014 UCD9244-EP
PRODUCTION DATA.
Conditioning should be provided on the EAP and EAN signals. Figure 9 shows a divider network between the output voltage and the voltage sense input to the controller. The resistor divider is used to bring the output voltage within the dynamic range of the controller. When no attenuation is needed, R2 can be left open and the signal conditioned by the low-pass filter formed by R1 and C2.
As with any power supply system, maximize the accuracy of the output voltage by sensing the voltage directly across an output capacitor as close to the load as possible. Route the positive and negative differential sense signals as a balanced pair of traces or as a twisted pair cable back to the controller. Put the divider network close to the controller. This ensures that there is low impedance driving the differential voltage sense signal from the voltage rail output back to the controller. The resistance of the divider network is a trade-off between power loss and minimizing interference susceptibility. A parallel resistance (Rp) of 1kΩ to 4kΩ is a good compromise. Once RP is chosen, R1 and R2 can be determined from the following formulas.
It is recommended that a capacitor be placed across the lower resistor of the divider network. This acts as an additional pole in the compensation and as an anti-alias filter for the EADC. To be effective as an anti-alias filter, the corner frequency should be 35% to 40% of the switching frequency. Then the capacitor is calculated as:
To obtain the best possible accuracy, the input resistance and offset current on the device should be considered when calculating the gain of a voltage divider between the output voltage and the EA sense inputs of the UCD9244. The input resistance and input offset current are specified in the parametric tables in this datasheet. VEA = VEAP – VEAN in the equation below.
The effect of the offset current can be reduced by making the resistance of the divider network low.