10.1.1.1 Demonstration Boards

Two printed circuit boards (PCBs) are available to assist in the initial evaluation of circuit performance using the VCA821 device in the two package options. Both of these are offered free of charge as unpopulated PCBs that are delivered with a user's guide. The summary information for these fixtures is shown in Table 1.

The demonstration fixtures can be requested at the Texas Instruments web site (www.ti.com) through the VCA821 device product folder.

10.1.1.2 Macromodels and Applications Support

Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. This principle is particularly true for video and RF amplifier circuits where parasitic capacitance and inductance can play a major role in circuit performance. A SPICE model for the VCA821 device is available through the TI web page. The applications group is also available for design assistance. The models available from TI predict typical small-signal ac performance, transient steps, DC performance, and noise under a wide variety of operating conditions. The models include the noise terms found in the electrical specifications of the relevant product data sheet.

10.1.1.3 Operating Suggestions

Operating the VCA821 optimally for a specific application requires trade-offs between bandwidth, input dynamic range and the maximum input voltage, the maximum gain of operation and gain, output dynamic range and the maximum input voltage, the package used, loading, and layout and bypass recommendations. The Typical Characteristics have been defined to cover as much ground as possible to describe the VCA821 operation. There are four sections in the Typical Characteristics:

• V_S = ±5 V DC Parameters and V_S = ±5V DC and Power-Supply Parameters, which include DC operation and the intrinsic limitation of a VCA821 device design
• V_S = ±5 V, A_VMAX = 6 dB Gain of 6dB Operation
• V_S = ±5 V, A_VMAX = 20 dB Gain of 20dB Operation
• V_S = ±5 V, A_VMAX = 32 dB Gain of 32dB Operation

Where the Typical Characteristics describe the actual performance that can be achieved by using the amplifier properly, the following sections describe in detail the trade-offs needed to achieve this level of performance.

10.1.1.4 Package Considerations

The VCA821 device is available in both SOIC-14 and VSSOP-10 packages. Each package has, for the different gains used in the typical characteristics, different values of R_F and R_G in order to achieve the same performance detailed in the Electrical Characteristics table.

Figure 76 shows a test gain circuit for the VCA821 device. Table 2 lists the recommended configuration for the SOIC-14 and VSSOP-10 packages.

Figure 76. Test Circuit

There are no differences between the packages in the recommended values for the gain and feedback resistors. However, the bandwidth for the VCA821IDGS (VSSOP-10 package) is lower than the bandwidth for the VCA821ID (SOIC-14 package). This difference is true for all gains, but especially true for gains greater than 5 V/V, as can be seen in Figure 77 and Figure 78.

Figure 77. SOIC-14 Recommended R_F and R_G vs A_VMAX

Figure 78. VSSOP-10 Recommended R_F and R_G vs A_VMAX

10.2.1.1 Design Requirements

The design shown in Figure 79 requires a single-ended input, continuously variable gain control and a single-ended output. This configuration is used to achieve the best performance with a bipolar supply. This circuit also requires a maximum gain of 10 V/V and low noise.

10.2.1.2 Detailed Design Procedure

The VCA821 device provides an exceptional combination of high output power capability with a wideband, greater than 40-dB gain adjust range, linear in dB variable gain amplifier. The VCA821 device input stage places the transconductance element between two input buffers, using the output currents as the forward signal. As the differential input voltage rises, a signal current is generated through the gain element. This current is then mirrored and gained by a factor of two before reaching the multiplier. The other input of the multiplier is the voltage gain control pin, V_G. Depending on the voltage present on V_G, up to two times the gain current is provided to the transimpedance output stage. The transimpedance output stage is a current-feedback amplifier providing high output current capability and high slew rate, 2500 V/μs. This exceptional full-power performance comes at the price of relatively high quiescent current (34 mA), but low input voltage noise for this type of architecture (6 nV/√Hz).

Figure 79 shows the DC-coupled, gain of +10 V/V, dual power-supply circuit used as the basis of the ±5-V Electrical Characteristics and Typical Characteristics. For test purposes, the input impedance is set to 50 Ω with a resistor to ground and the output impedance is set to 50 Ω with a series output resistor. Voltage swings reported in the Electrical Characteristics table are taken directly at the input and output pins, while output power (dBm) is at the matched 50-Ω load. For the circuit in Figure 79, the total effective load is 100 Ω ∥ 1 kΩ.

An X2Y® capacitor has been used for power-supply bypassing. The combination of low inductance, high resonance frequency, and integration of three capacitors in one package (two capacitors to ground and one across the supplies) enables the VCA821 device to achieve the low second-harmonic distortion reported in the Electrical Characteristics table. More information on how the VCA821 device operates can be found in the Operating Suggestions section.

10.2.1.3 Application Curve

Figure 80. Large-Signal Frequency Response

10.2.2.1 Design Requirements

For a difference amplifier, the design requirements are differential voltage gain, common mode rejection, and load drive capability. This circuit delivers differential gain of 2* (Rf/Rg), and CMRR as shown in Figure 82.

10.2.2.2 Detailed Design Procedure

Because both inputs of the VCA821 device are high-impedance, a difference amplifier can be implemented without any major problem. Figure 81 shows this implementation. This circuit provides excellent common-mode rejection ratio (CMRR) as long as the input is within the CMRR range of –2.1 V to +1.6 V.

Figure 82 shows the common-mode rejection ratio for this circuit implemented in a gain of 20 dB for V_G = +2 V.

10.2.2.3 Application Curve

Figure 82. Common-Mode Rejection Ratio

10.2.3.1 Design Requirements

Signals that travel over a length of cable experience an attenuation that is proportional to the square root of the frequency. For this reason, a fixed bandwidth amplifier will not restore the original signal. To replicate the original signal, the higher frequency signal components require more gain. The circuit in Figure 83 has one stage of frequency shaping to help restore a signal transmitted along a cable. If needed, additional frequency shaping stages can be added as shown in Figure 84.

10.2.3.2 Detailed Design Procedure

If the application requires frequency shaping (the transition from one gain to another), the VCA821 device can be used advantageously because its architecture allows the application to isolate the input from the gain setting elements. Figure 83 shows an implementation of such a configuration. The transfer function is shown in Equation 5.

This transfer function has one pole, P₁ (located at R_GC₁), and one zero, Z₁ (located at R₁C₁). When equalizing an RC load, R_L and C_L, compensate the pole added by the load located at R_LC_L with the zero Z₁. Knowing R_L, C_L, and R_G allows the user to select C₁ as a first step and then calculate R₁. Using R_L = 75 Ω, C_L = 100 pF and wanting the VCA821 device to operate at a gain of +2 V/V (which gives R_F = R_G = 453 Ω) allows the user to select C₁ = 15.5 pF to ensure a positive value for the resistor R₁. With all these values known, to achieve greater than 300-MHz bandwidth, R₁ can be calculated to be 20 Ω. Figure 84 shows the frequency response for both the initial, unequalized frequency response and the resulting equalized frequency response.

Equation 5.

10.2.3.3 Application Curve

Figure 84. Differential Equalization of an RC Load

10.2.4.1 Design Requirements

Signals that travel over a length of cable experience an attenuation that is proportional to the square root of the frequency. For this reason, a fixed bandwidth amplifier will not restore the original signal. To replicate the original signal, the higher frequency signal components require more gain. The circuit in Figure 85 has multiple stages of frequency shaping to help restore a signal transmitted along a cable. This circuit is similar to the one shown in Figure 83, but is much more accurate in replicating the 1/(sqrt(f)) frequency response shape.

10.2.4.2 Detailed Design Procedure

A differential cable equalizer can easily be implemented using the VCA821 device. An example of a cable equalization for 100 feet of Belden cable 1694F is illustrated in Figure 84, with Figure 86 showing the result for this implementation. This implementation has a maximum error of 0.2 dB from DC to 70 MHz.

For a given frequency, the equalization function realized with the VCA821 device matches the cable attenuation. The circuit in Figure 85 is a driver circuit. To implement a receiver circuit, the signal is received differentially between the +V_IN and –V_IN inputs.

10.2.4.3 Application Curve

Figure 86. Cable Attenuation vs Equalizer Gain

10.2.5.1 Design Requirements

When dynamic signal amplitude correction is required, an AGC loop will provide real-time gain control. The requirements for this circuit are fast gain control response and linear in dB gain control. The time constant of the loop is set with the 0.1-µF capacitor and the 1-kΩ resistor. The OPA695 provides additional load driving capability.

10.2.5.2 Detailed Design Procedure

In the typical AGC loop shown in Figure 87, the OPA695 device follows the VCA821 device to provide 40 dB of overall gain. The output of the OPA695 device is rectified and integrated by an OPA820 device to control the gain of the VCA821 device. When the output level exceeds the reference voltage (V_REF), the integrator ramps down reducing the gain of the AGC loop. Conversely, if the output is too small, the integrator ramps up increasing the net gain and the output voltage.