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ADS8661W 12-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System With Programmable Bipolar Input Ranges
SBASB35
January 2025
ADS8661W
PRODUCTION DATA
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ADS8661W 12-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System With Programmable Bipolar Input Ranges
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
Switching Characteristics
5.8
Timing Diagrams
5.9
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Analog Input Structure
6.3.2
Analog Input Impedance
6.3.3
Input Protection Circuit
6.3.4
Programmable Gain Amplifier (PGA)
6.3.5
Second-Order, Low-Pass Filter (LPF)
6.3.6
ADC Driver
6.3.7
Reference
6.3.7.1
Internal Reference
6.3.7.2
External Reference
6.3.8
ADC Transfer Function
6.3.9
Alarm Features
6.3.9.1
Input Alarm
6.3.9.2
AVDD Alarm
6.4
Device Functional Modes
6.4.1
Host-to-Device Connection Topologies
6.4.1.1
Single Device: All multiSPI Options
6.4.1.2
Single Device: Standard SPI Interface
6.4.1.3
Multiple Devices: Daisy-Chain Topology
6.4.2
Device Operational Modes
6.4.2.1
RESET State
6.4.2.2
ACQ State
6.4.2.3
CONV State
6.5
Programming
6.5.1
Data Transfer Frame
6.5.2
Input Command Word and Register Write Operation
6.5.3
Output Data Word
6.5.4
Data Transfer Protocols
6.5.4.1
Protocols for Configuring the Device
6.5.4.2
Protocols for Reading From the Device
6.5.4.2.1
Legacy, SPI-Compatible (SYS-xy-S) Protocols With a Single SDO-x
6.5.4.2.2
Legacy, SPI-Compatible (SYS-xy-S) Protocols With Dual SDO-x
6.5.4.2.3
Source-Synchronous (SRC) Protocols
6.5.4.2.3.1
Output Clock Source Options
6.5.4.2.3.2
Output Bus Width Options
7
Register Maps
7.1
Device Configuration and Register Maps
7.1.1
DEVICE_ID_REG Register (address = 00h)
7.1.2
RST_PWRCTL_REG Register (address = 04h)
7.1.3
SDI_CTL_REG Register (address = 08h)
7.1.4
SDO_CTL_REG Register (address = 0Ch)
7.1.5
DATAOUT_CTL_REG Register (address = 10h)
7.1.6
RANGE_SEL_REG Register (address = 14h)
7.1.7
ALARM_REG Register (address = 20h)
7.1.8
ALARM_H_TH_REG Register (address = 24h)
7.1.9
ALARM_L_TH_REG Register (address = 28h)
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.3.1
Power Supply Decoupling
8.3.2
Power Saving
8.3.2.1
NAP Mode
8.3.2.2
Power-Down (PD) Mode
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
RUM|16
MPQF223A
Thermal pad, mechanical data (Package|Pins)
RUM|16
QFND157C
Orderable Information
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Data Sheet
ADS8661W 12-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System With Programmable Bipolar Input Ranges
1
Features
12
-bit ADC with integrated analog front-end
High speed: 1.25MSPS
Software programmable input ranges:
Bipolar differential ranges: ±12.288V, ±10.24V, ±6.144V, ±5.12V, and ±2.56V
Unipolar differential ranges: 0V–12.288V, 0V–10.24V, 0V–6.144V, and 0V–5.12V
Analog supply (5V): 1.65V to 5V I/O supply
Constant resistive input impedance ≥ 1MΩ
Input bandwidth: 450kHz
Input overvoltage protection: Up to ±20V
On-chip, 4.096V reference with low drift
Excellent performance:
DNL:
±0.1LSB
; INL:
±0.15LSB
SNR:
74dBFS
; THD:
–102dB
ALARM feature with high, low threshold
multiSPI™
interface with daisy-chain
Extended industrial temperature range:
–40°C to +125°C
2
Applications
Analog input modules
Semiconductor tests
Servo drive control modules
