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CDx4AC08 Quadruple 2-Input Positive-and Gates
- SCHS307D January 2001 – August 2024 CD54AC08 , CD74AC08
  
  PRODUCTION DATA

CONTENTS
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CDx4AC08 Quadruple 2-Input Positive-and Gates

1
1 Features
2 Description
3 Pin Configuration and Functions
4 Specifications
5 Parameter Measurement Information
6 Detailed Description
1. 6.1 Functional Block Diagram
2. 6.2 Device Functional Modes
7 Application and Implementation
1. 7.1 Power Supply Recommendations
2. 7.2 Layout
  1. 7.2.1 Layout Guidelines
  2. 7.2.2 Layout Example
8 Device and Documentation Support
9 Revision History
10Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)

D|14
N|14

Thermal pad, mechanical data (Package|Pins)

Orderable Information

schs307d_oa
schs307d_pm

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CDx4AC08 Quadruple 2-Input Positive-and Gates

1 Features

AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage
Speed of bipolar F, AS, and S, with significantly reduced power consumption
Balanced propagation delays
Buffered inputs
±24mA output drive current

- Fanout to 15 F devices
SCR-latchup-resistant CMOS process and circuit design
Exceeds 2kV ESD protection per MIL-STD-883, method 3015

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