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High-Speed CMOS Logic Quad Bilateral Switch
SCHS208E
February 1998 – July 2024
CD54HC4066
,
CD74HC4066
,
CD74HCT4066
PRODUCTION DATA
CONTENTS
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High-Speed CMOS Logic Quad Bilateral Switch
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Absolute Maximum Ratings
6
ESD Ratings
7
Thermal Information
8
Recommended Operating Conditions
9
Electrical Characteristics: HC Devices
10
Electrical Characteristics: HCT Devices
11
Switching Characteristics HC
12
Switching Characteristics HCT
13
Analog Channel Specifications
14
Analog Test Circuits
15
Test Circuits and Waveforms
16
Detailed Description
16.1
Functional Block Diagram
16.2
Device Functional Modes
17
Device and Documentation Support
17.1
Receiving Notification of Documentation Updates
17.2
Support Resources
17.3
Trademarks
17.4
Electrostatic Discharge Caution
17.5
Glossary
18
Revision History
19
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
N|14
MPDI002C
D|14
MPDS177H
Thermal pad, mechanical data (Package|Pins)
Orderable Information
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Data Sheet
High-Speed CMOS Logic Quad Bilateral Switch
1
Features
Wide analog-input-voltage range:
0 V – 10 V
Low ON resistance:
V
CC
= 4.5 V: 25 Ω
V
CC
= 9 V: 15 Ω
Fast switching and propagation delay times
Low OFF leakage current
Wide operating temperature range:
–55°C to 125°C
HC types:
2 V to 10 V operation
High noise immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5 V and 10 V
HCT types:
Direct LSTTL input logic compatibility, V
IL
= 0.8 V (maximum), V
IH
= 2 V (minimum)
CMOS input compatibility, I
l
≤ 1 µA at
V
OL
, V
OH
2
Applications
Analog signal switching and multiplexing: signal gating, modulators, squelch controls, demodulators, choppers, commutating switches
Digital signal switching and multiplexing: Analog-to-digital and digital-to-analog conversions
Digital control of frequency, impedance, phase, and analog-signal gain
Building automation