REF19xx 低漂移、低功率、双路输出、VREF 和 VREF/2 电压基准

器件信息⁽¹⁾

Pin Functions

7.1 Absolute Maximum Ratings

7.2 ESD Ratings

7.3 Recommended Operating Conditions

7.4 Thermal Information

7.5 Electrical Characteristics

7.6 Typical Characteristics

Figure 1. V_REF – 2 × V_BIAS Distribution

–40°C ≤ TA ≤ 125°C

Figure 3. Distribution of V_REF – 2 × V_BIAS Drift Tracking
Over Temperature

Refer to the Solder Heat Shift section for more information.

Figure 5. Solder Heat Shift Distribution (V_BIAS)

Figure 7. V_REF – 2 × V_BIAS Tracking vs Temperature

VBIAS output

Figure 9. Output Voltage Change vs Load Current (V_BIAS)

VBIAS output

IL = 20 mA

Figure 11. Load Regulation Sourcing vs Temperature (V_BIAS)

VBIAS output

IL = –20 mA

Figure 13. Load Regulation Sinking vs Temperature (V_BIAS)

VBIAS output

Figure 15. Line Regulation vs Temperature (V_BIAS)

CL = 10 µF

Figure 17. Power-Supply Rejection Ratio vs Frequency

CL = 10 µF

Figure 19. Line Transient Response

CL = 10 µF

IL = ±1-mA step

Figure 21. Load Transient Response

CL = 10 µF

IL = ±20-mA step

Figure 23. Load Transient Response

CL = 1 µF

Figure 25. Turn-On Settling Time

Figure 27. Quiescent Current vs Temperature

VREF output

Figure 29. 0.1-Hz to 10-Hz Noise (V_REF)

Figure 31. Output Voltage Noise Spectrum

VBIAS output

Figure 33. Output Impedance vs Frequency (V_BIAS)

Figure 35. Thermal Hysteresis Distribution (V_BIAS)

–40°C ≤ TA ≤ 85°C

Figure 2. Distribution of V_REF – 2 × V_BIAS Drift Tracking
Over Temperature

Refer to the Solder Heat Shift section for more information.

Figure 4. Solder Heat Shift Distribution (V_REF)

Figure 6. Output Voltage Accuracy (V_REF) vs Temperature

VREF output

Figure 8. Output Voltage Change vs Load Current (V_REF)

VREF output

IL = 20 mA

Figure 10. Load Regulation Sourcing vs Temperature (V_REF)

VREF output

IL = –20 mA

Figure 12. Load Regulation Sinking vs Temperature (V_REF)

VREF output

Figure 14. Line Regulation vs Temperature (V_REF)

CL = 0 µF

Figure 16. Power-Supply Rejection Ratio vs Frequency

CL = 1 µF

Figure 18. Line Transient Response

CL = 1 µF

IL = ±1-mA step

Figure 20. Load Transient Response

CL = 1 µF

IL = ±20-mA step

Figure 22. Load Transient Response

Figure 24. Minimum Dropout Voltage vs Load Current

CL = 10 µF

Figure 26. Turn-On Settling Time

Figure 28. Quiescent Current vs Input Voltage

VBIAS output

Figure 30. 0.1-Hz to 10-Hz Noise (V_BIAS)

VREF output

Figure 32. Output Impedance vs Frequency (V_REF)

Figure 34. Thermal Hysteresis Distribution (V_REF)

8.1 Solder Heat Shift

The materials used in the manufacture of the REF19xx have differing coefficients of thermal expansion, resulting in stress on the device die when the device is heated. Mechanical and thermal stress on the device die can cause the output voltages to shift, degrading the initial accuracy specifications of the product. Reflow soldering is a common cause of this error.

In order to illustrate this effect, a total of 92 devices were soldered on four printed circuit boards [23 devices on each printed circuit board (PCB)] using lead-free solder paste and the paste manufacturer suggested reflow profile. The reflow profile is as shown in Figure 36. The PCB is comprised of FR4 material. The board thickness is 1.57 mm and the area is 171.54 mm × 165.1 mm.

Figure 36. Reflow Profile

The reference and bias output voltages are measured before and after the reflow process; the typical shift is displayed in Figure 37 and Figure 38. Although all tested units exhibit very low shifts (< 0.01%), higher shifts are also possible depending on the size, thickness, and material of the PCB. An important note is that the histograms display the typical shift for exposure to a single reflow profile. Exposure to multiple reflows, which is common on PCBs with surface-mount components on both sides, causes additional shifts in the output bias voltage. If the PCB is exposed to multiple reflows, solder the device in the second pass to minimize device exposure to thermal stress.

Figure 37. Solder Heat Shift Distribution, V_REF (%)

Figure 38. Solder Heat Shift Distribution, V_BIAS (%)

8.2 Thermal Hysteresis

Thermal hysteresis is measured with the REF19xx soldered to a PCB, similar to a real-world application. Thermal hysteresis for the device is defined as the change in output voltage after operating the device at 25°C, cycling the device through the specified temperature range, and returning to 25°C. Hysteresis can be expressed by Equation 1:

Equation 1.

where

• V_HYST = thermal hysteresis (in units of ppm),
• V_NOM = the specified output voltage,
• V_PRE = output voltage measured at 25°C pre-temperature cycling, and
• V_POST = output voltage measured after the device has cycled from 25°C through the specified temperature range of –40°C to 125°C and returns to 25°C.

Typical thermal hysteresis distribution is as shown in Figure 39 and Figure 40.

Figure 39. Thermal Hysteresis Distribution (V_REF)

Figure 40. Thermal Hysteresis Distribution (V_BIAS)

8.3 Noise Performance

Typical 0.1-Hz to 10-Hz voltage noise is shown in Figure 41 and Figure 42. Device noise increases with output voltage and operating temperature. Additional filtering can be used to improve output noise levels, although care must be taken to ensure the output impedance does not degrade ac performance. Peak-to-peak noise measurement setup is shown in Figure 43.

Figure 41. 0.1-Hz to 10-Hz Noise (V_REF)

Figure 42. 0.1-Hz to 10-Hz Noise (V_BIAS)

Figure 43. 0.1-Hz to 10-Hz Noise Measurement Setup

9.1 Overview

The REF19xx is a family of dual-output, V_REF and V_BIAS (V_REF / 2) band-gap voltage references. The Functional Block Diagram section provides a block diagram of the basic band-gap topology and the two buffers used to derive the V_REF and V_BIAS outputs. Transistors Q₁ and Q₂ are biased such that the current density of Q₁ is greater than that of Q₂. The difference of the two base emitter voltages (V_BE1 – V_BE2) has a positive temperature coefficient and is forced across resistor R₅. The voltage is amplified and added to the base emitter voltage of Q₂, which has a negative temperature coefficient. The resulting band-gap output voltage is almost independent of temperature. Two independent buffers are used to generate V_REF and V_BIAS from the band-gap voltage. The resistors R₁, R₂ and R₃, R₄ are sized such that V_BIAS = V_REF / 2.

e-Trim™ is a method of package-level trim for the initial accuracy and temperature coefficient of V_REF and V_BIAS, implemented during the final steps of manufacturing after the plastic molding process. This method minimizes the influence of inherent transistor mismatch, as well as errors induced during package molding. e-Trim is implemented in the REF19xx to minimize the temperature drift and maximize the initial accuracy of both the V_REF and V_BIAS outputs.

9.2 Functional Block Diagram

9.3 Feature Description

9.3.1 V_REF and V_BIAS Tracking

Most single-supply systems require an additional stable voltage in the middle of the analog-to-digital converter (ADC) input range to bias input bipolar signals. The V_REF and V_BIAS outputs of the REF19xx are generated from the same band-gap voltage as shown in the Functional Block Diagram section. Hence, both outputs track each other over the full temperature range of –40°C to 125°C with an accuracy of 7 ppm/°C (max). The tracking accuracy increases to 6 ppm/°C (max) when the temperature range is limited to –40°C to 85°C. The tracking error is calculated using the box method, as described by Equation 2:

Equation 2.

where

• 

The tracking accuracy is as shown in Figure 44.

Figure 44. V_REF and V_BIAS Tracking vs Temperature

9.3.2 Low Temperature Drift

The REF19xx is designed for minimal drift error, which is defined as the change in output voltage over temperature. The drift is calculated using the box method, as described by Equation 3:

Equation 3.

9.3.3 Load Current

The REF19xx family is specified to deliver a current load of ±20 mA per output. Both the V_REF and V_BIAS outputs of the device are protected from short circuits by limiting the output short-circuit current to 50 mA. The device temperature increases according to Equation 4:

Equation 4.

where

• T_J = junction temperature (°C),
• T_A = ambient temperature (°C),
• P_D = power dissipated (W), and
• R_θJA = junction-to-ambient thermal resistance (°C/W).

The REF19xx maximum junction temperature must not exceed the absolute maximum rating of 150°C.

9.4 Device Functional Modes

When the EN pin of the REF19xx is pulled high, the device is in active mode. The device must be in active mode for normal operation. The REF19xx can be placed in a low-power mode by pulling the ENABLE pin low. When in shutdown mode, the output of the device becomes high impedance and the quiescent current of the device reduces to 5 µA in shutdown mode. See the Electrical Characteristics for logic high and logic low voltage levels.

10.1 Application Information

The low-drift, bidirectional, single-supply, low-side, current-sensing solution described in this section can accurately detect load currents from –2.5 A to 2.5 A. The linear range of the output is from 250 mV to 2.75 V. Positive current is represented by output voltages from 1.5 V to 2.75 V, whereas negative current is represented by output voltages from 250 mV to 1.5 V. The difference amplifier is the INA213 current-shunt monitor, whose supply and reference voltages are supplied by the low-drift REF1930.

10.2 Typical Application

Figure 45. Low-Side, Current-Sensing Application

10.2.2 Detailed Design Procedure

Low-side current sensing is desirable because the common-mode voltage is near ground. Therefore, the current-sensing solution is independent of the bus voltage, V_BUS. When sensing bidirectional currents, use a differential amplifier with a reference pin. This procedure allows for the differentiation between positive and negative currents by biasing the output stage such that it can respond to negative input voltages. There are a variety of methods for supplying power (V+) and the reference voltage (V_REF, or V_BIAS) to the differential amplifier. For a low-drift solution, use a monolithic reference that supplies both power and the reference voltage. Figure 46 shows the general circuit topology for a low-drift, low-side, bidirectional, current-sensing solution. This topology is particularly useful when interfacing with an ADC; see Figure 45. Not only do V_REF and V_BIAS track over temperature, but their matching is much better than alternate topologies. For a more detailed version of the design procedure, refer to TIDU357.

Figure 46. Low-Drift, Low-side, Bidirectional, Current-Sensing Circuit Topology

The transfer function for the circuit given in Figure 46 is as shown in Equation 5:

Equation 5.

10.2.2.1 Shunt Resistor

As illustrated in Figure 46, the value of V_SHUNT is the ground potential for the system load. If the value of V_SHUNT is too large, issues may arise when interfacing with systems whose ground potential is actually 0 V. Also, a value of V_SHUNT that is too negative may violate the input common-mode voltage of the differential amplifier in addition to potential interfacing issues. Therefore, limiting the voltage across the shunt resistor is important. Equation 6 can be used to calculate the maximum value of R_SHUNT.

Equation 6.

Given that the maximum shunt voltage is ±25 mV and the load current range is ±2.5 A, the maximum shunt resistance is calculated as shown in Equation 7.

Equation 7.

To minimize errors over temperature, select a low-drift shunt resistor. To minimize offset error, select a shunt resistor with the lowest tolerance. For this design, the Y14870R01000B9W resistor is used.

10.2.2.2 Differential Amplifier

The differential amplifier used for this design must have the following features:

1. Single supply (3 V),
2. Reference voltage input,
3. Low initial input offset voltage (V_OS),
4. Low-drift,
5. Fixed gain, and
6. Low-side sensing (input common-mode range below ground).

For this design, a current-shunt monitor (INA213) is used. The INA21x family topology is shown in Figure 47. The INA213B specifications can be found in the INA213 product data sheet.

Figure 47. INA21x Current-Shunt Monitor Topology

The INA213B is an excellent choice for this application because all the required features are included. In general, instrumentation amplifiers (INAs) do not have the input common-mode swing to ground that is essential for this application. In addition, INAs require external resistors to set their gain, which is not desirable for low-drift applications. Difference amplifiers typically have larger input bias currents, which reduce solution accuracy at small load currents. Difference amplifiers typically have a gain of 1 V/V. When the gain is adjustable, these amplifiers use external resistors that are not conducive to low-drift applications.

10.2.2.3 Voltage Reference

The voltage reference for this application must have the following features:

1. Dual output (3.0 V and 1.5 V),
2. Low drift, and
3. Low tracking errors between the two outputs.

For this design, the REF1930 is used. The REF19xx topology is as shown in the Functional Block Diagram section.

The REF1930 is an excellent choice for this application because of its dual output. The temperature drift of
25 ppm/°C and initial accuracy of 0.1% make the errors resulting from the voltage reference minimal in this application. In addition, there is minimal mismatch between the two outputs and both outputs track very well across temperature, as shown in Figure 48 and Figure 49.

Figure 48. V_REF – 2 × V_BIAS Distribution (At T_A = 25°C)

Figure 49. Distribution of V_REF – 2 × V_BIAS Drift Tracking Over Temperature

10.2.2.4 Results

Table 1 summarizes the measured results.

Table 1. Measured Results

ERROR	UNCALIBRATED (%)	CALIBRATED (%)
Error across the full load current range (25°C)	±0.0355	±0.004
Error across the full load current range (–40°C to 125°C)	±0.0522	±0.0606

10.2.3 Application Curves

Performing a two-point calibration at 25°C removes the errors associated with offset voltage, gain error, and so forth. Figure 50 to Figure 52 show the measured error at different conditions. For a more detailed description on measurement procedure, calibration, and calculations, please refer to TIDU357.

Figure 50. Measured Transfer Function

Figure 52. Calibrated Error vs Load Current

Figure 51. Uncalibrated Error vs Load Current

The REF19xx family of references feature an extremely low-dropout voltage. These references can be operated with a supply of only 20 mV above the output voltage. For loaded reference conditions, a typical dropout voltage versus load is shown in Figure 53. A supply bypass capacitor ranging between 0.1 µF to 10 µF is recommended.

Figure 53. Dropout Voltage vs Load Current

12.1 Layout Guidelines

Figure 54 shows an example of a PCB layout for a data acquisition system using the REF1930. Some key considerations are:

• Connect low-ESR, 0.1-μF ceramic bypass capacitors at V_IN, V_REF, and V_BIAS of the REF1930.
• Decouple other active devices in the system per the device specifications.
• Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.
• Place the external components as close to the device as possible. This configuration prevents parasitic errors (such as the Seebeck effect) from occurring.
• Minimize trace length between the reference and bias connections to the INA and ADC to reduce noise pickup.
• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible and only make perpendicular crossings when absolutely necessary.

12.2 Layout Example

Figure 54. Layout Example

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