CSD18511Q5A 40 V N-Channel NexFET™ Power MOSFET

1 Features

Low R_DS(ON)
Low Thermal Resistance
Avalanche Rated
Logic Level
Pb Free Terminal Plating
RoHS Compliant
Halogen Free
SON 5-mm × 6-mm Plastic Package

2 Applications

DC-DC Conversion
Secondary Side Synchronous Rectifier
Battery Motor Control

3 Description

This 40 V, 1.9 mΩ, SON 5 × 6 mm NexFET™ power MOSFET has been designed to minimize losses in power conversion applications.

Top View

Product Summary

T_A = 25°C		TYPICAL VALUE		UNIT
V_DS	Drain-to-Source Voltage	40		V
Q_g	Gate Charge Total (10 V)	63		nC
Q_gd	Gate Charge Gate-to-Drain	11.2		nC
R_DS(on)	Drain-to-Source On-Resistance	V_GS = 4.5 V	2.7	mΩ
R_DS(on)	Drain-to-Source On-Resistance	V_GS = 10 V	1.9	mΩ
V_GS(th)	Threshold Voltage	1.8		V

Ordering Information⁽¹⁾

Device	Qty	Media	Package	Ship
CSD18511Q5A	2500	13-Inch Reel	SON 5 mm × 6 mm Plastic Package	Tape and Reel
CSD18511Q5AT	250	7-Inch Reel	SON 5 mm × 6 mm Plastic Package	Tape and Reel

For all available packages, see the orderable addendum at the end of the data sheet.

Absolute Maximum Ratings

T_A = 25°C		VALUE	UNIT
V_DS	Drain-to-Source Voltage	40	V
V_GS	Gate-to-Source Voltage	±20	V
I_D	Continuous Drain Current (Package limited)	100	A
	Continuous Drain Current (Silicon limited), T_C = 25°C	159	A
	Continuous Drain Current ⁽¹⁾	27	A
I_DM	Pulsed Drain Current ⁽²⁾	400	A
P_D	Power Dissipation⁽¹⁾	3.1	W
P_D	Power Dissipation, T_C = 25°C	104	W
T_J, T_stg	Operating Junction and Storage Temperature Range	–55 to 150	°C
E_AS	Avalanche Energy, Single Pulse I_D = 56 A, L = 0.1 mH, R_G = 25 Ω	157	mJ

Typical R_θJA = 40°C/W on a 1-inch², 2-oz. Cu pad on a 0.06-inch thick FR4 PCB.
Max R_θJC = 1.2°C/W, Pulse duration ≤100μs, duty cycle ≤1%

R_DS(on) vs V_GS

Gate Charge

4 Revision History

DATE	REVISION	NOTES
December 2016	*	Initial release.

5 Specifications

5.1 Electrical Characteristics

(T_A = 25°C unless otherwise stated)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
STATIC CHARACTERISTICS
BV_DSS	Drain-to-Source Voltage	V_GS = 0 V, I_D = 250 μA	40			V
I_DSS	Drain-to-Source Leakage Current	V_GS = 0 V, V_DS = 32 V			1	μA
I_GSS	Gate-to-Source Leakage Current	V_DS = 0 V, V_GS = 20 V			100	nA
V_GS(th)	Gate-to-Source Threshold Voltage	V_DS = V_GS, I_D = 250 μA	1.5	1.8	2.4	V
R_DS(on)	Drain-to-Source On-Resistance	V_GS = 4.5 V, I_D = 24 A		2.7	3.5	mΩ
R_DS(on)	Drain-to-Source On-Resistance	V_GS = 10 V, I_D = 24 A		1.9	2.3	mΩ
g_ƒs	Transconductance	V_DS = 20 V, I_D = 24 A		5.2		S
DYNAMIC CHARACTERISTICS
C_iss	Input Capacitance	V_GS = 0 V, V_DS = 20 V, ƒ = 1 MHz		4500	5850	pF
C_oss	Output Capacitance			452	588	pF
C_rss	Reverse Transfer Capacitance			238	309	pF
R_G	Series Gate Resistance			0.7	1.4	Ω
Q_g	Gate Charge Total (10 V)	V_DS = 20 V, I_D = 24 A		63	82	nC
Q_g	Gate Charge Total (4.5 V)			31	41	nC
Q_gd	Gate Charge Gate-to-Drain			11.2		nC
Q_gs	Gate Charge Gate-to-Source			13.2		nC
Q_g(th)	Gate Charge at Vth			8.2		nC
Q_oss	Output Charge	V_DS = 20 V, V_GS = 0 V		20		nC
t_d(on)	Turn On Delay Time	V_DS = 20 V, V_GS = 10 V, I_DS = 24 A, R_G = 0		6		ns
t_r	Rise Time			15		ns
t_d(off)	Turn Off Delay Time			24		ns
t_ƒ	Fall Time			5		ns
DIODE CHARACTERISTICS
V_SD	Diode Forward Voltage	I_DS = 24 A, V_GS = 0 V		0.75	1	V
Q_rr	Reverse Recovery Charge	V_DS= 20 V, I_F = 24 A, di/dt = 300 A/μs		17		nC
t_rr	Reverse Recovery Time	V_DS= 20 V, I_F = 24 A, di/dt = 300 A/μs		14		ns

5.2 Thermal Information

(T_A = 25°C unless otherwise stated)

THERMAL METRIC		MIN	TYP	MAX	UNIT
R_θJC	Junction-to-Case Thermal Resistance⁽¹⁾			1.2	°C/W
R_θJA	Junction-to-Ambient Thermal Resistance⁽¹⁾⁽²⁾			50	°C/W

(1) R_θJC is determined with the device mounted on a 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inches × 1.5-inches
(3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. R_θJC is specified by design, whereas R_θJA is determined by the user’s board design.

(2) Device mounted on FR4 material with 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu.