SLPS422B
March 2013 – August 2016
CSD97376Q4M
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Application Diagram
Typical Power Stage Efficiency and Power Loss
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Functional Block Diagram
7.2
Powering CSD97376Q4M and Gate Drivers
7.3
Undervoltage Lockout Protection (UVLO)
7.4
PWM Pin
7.5
SKIP# Pin
7.5.1
Zero Crossing (ZX) Operation
7.6
Integrated Boost-Switch
8
Application and Implementation
8.1
Application Information
8.2
Power Loss Curves
8.3
Safe Operating Curves (SOA)
8.4
Normalized Curves
8.5
Calculating Power Loss and SOA
8.5.1
Design Example
8.5.2
Calculating Power Loss
8.5.3
Calculating SOA Adjustments
9
Layout
9.1
Layout Guidelines
9.1.1
Recommended PCB Design Overview
9.1.2
Electrical Performance
9.1.3
Thermal Performance
9.2
Layout Example
10
Device and Documentation Support
10.1
Receiving Notification of Documentation Updates
10.2
Community Resources
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
Glossary
11
Mechanical, Packaging, and Orderable Information
11.1
Package Dimensions
11.2
Recommended PCB Land Pattern
11.3
Recommended Stencil Opening
Package Options
Mechanical Data (Package|Pins)
DPC|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slps422b_oa
slps422b_pm
1
Features
90% System Efficiency at 15 A
Max Rated Continuous Current 20 A, Peak 45 A
High-Frequency Operation (up to 2 MHz)
High-Density SON 3.5-mm x 4.5-mm Footprint
Ultra-Low Inductance Package
System Optimized PCB Footprint
Ultra-Low Quiescent (ULQ) Current Mode
3.3-V and 5-V PWM Signal Compatible
Diode Emulation Mode with FCCM
Input Voltages up to 24 V
Tri-State PWM Input
Integrated Bootstrap Diode
Shoot-Through Protection
RoHS Compliant – Lead-Free Terminal Plating
Halogen Free