The DAC8311 (14-bit) and DAC8411 (16-bit) devices are low-power, single-channel, voltage output digital-to-analog converters (DAC). They provide excellent linearity and minimize undesired code-to-code transient voltages while offering an easy upgrade path within a pin-compatible family. All devices use a versatile, 3-wire serial interface that operates at clock rates of up to 50 MHz and is compatible with standard SPI™, QSPI™, Microwire, and digital signal processor (DSP) interfaces.
All devices use an external power supply as a reference voltage to set the output range. The devices incorporate a power-on reset (POR) circuit that ensures the DAC output powers up at 0 V and remains there until a valid write to the device occurs. The DAC8311 and DAC8411 contain a power-down feature, accessed over the serial interface, that reduces current consumption of the device to 0.1 μA at 2 V in power down mode. The low power consumption of these devices in normal operation makes it ideally suited for portable, battery-operated equipment. The power consumption is 0.55 mW at 5 V, reducing to 2.5 μW in power-down mode.
These devices are pin-compatible with the DAC5311, DAC6311, and DAC7311, offering an easy upgrade path from 8-, 10-, and 12-bit resolution to 14- and 16-bit. All devices are available in a small, 6-pin, SC70 package. This package offers a flexible, pin-compatible, and functionally-compatible drop-in solution within the family over an extended temperature range of –40°C to 125°C.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
DAC8311 DAC8411 |
SC70 (6) | 2.00 mm × 1.25 mm |
Changes from B Revision (May 2013) to C Revision
Changes from A Revision (August, 2011) to B Revision
Changes from * Revision (August, 2008) to A Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AVDD/VREF | 4 | I | Power Supply Input, +2 V to +5.5 V. |
DIN | 3 | I | Serial Data Input. Data is clocked into the 24-bit (DAC8411) or 16-bit (DAC8311) input shift register on the falling edge of the serial clock input. |
GND | 5 | — | Ground reference point for all circuitry on the part. |
SCLK | 2 | I | Serial Clock Input. Data can be transferred at rates up to 50 MHz. |
SYNC | 1 | I | Level-triggered control input (active low). This is the frame sychronization signal for the input data. When SYNC goes low, it enables the input shift register and data are transferred in on the falling edges of the following clocks. The DAC is updated following the 24th (DAC8411) or 16th (DAC8311) clock cycle, unless SYNC is taken high before this edge, in which case the rising edge of SYNC acts as an interrupt and the write sequence is ignored by the DAC8x11. Refer to the DAC8311 and DAC8411SYNC Interrupt sections for more details. |
VOUT | 6 | O | Analog output voltage from DAC. The output amplifier has rail-to-rail operation. |