The DRV8814 provides an integrated motor driver solution for printers, scanners, and other automated equipment applications. The device has two H-bridge drivers, and is intended to drive DC motors. The output driver block for each consists of N-channel power MOSFET’s configured as H-bridges to drive the motor windings. The DRV8814 can supply up to 2.5-A peak or 1.75-A RMS output current (with proper heatsinking at 24 V and 25°C) per H-bridge.
A simple parallel digital control interface is compatible with industry-standard devices. Decay mode is programmable to allow braking or coasting of the motor when disabled.
Internal shutdown functions are provided for over current protection, short circuit protection, under voltage lockout, and over temperature.
The DRV8814 is available in a 28-pin HTSSOP package with PowerPAD™ (Eco-friendly: RoHS & no Sb/Br).
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
DRV8814 | HTSSOP (28) | 9.70 mm x 4.40 mm |
Changes from D Revision (August 2013) to E Revision
PIN | I/O(1) | DESCRIPTION | EXTERNAL COMPONENTS OR CONNECTIONS |
|
---|---|---|---|---|
NAME | NO. | |||
POWER AND GROUND | ||||
GND | 14, 28 | - | Device ground | |
VMA | 4 | - | Bridge A power supply | Connect to motor supply (8 V to 45 V). Both pins must be connected to the same supply, bypassed with a 0.1-µF capacitor to GND, and connected to appropriate bulk capacitance. |
VMB | 11 | - | Bridge B power supply | |
V3P3OUT | 15 | O | 3.3-V regulator output | Bypass to GND with a 0.47-μF 6.3-V ceramic capacitor. Can be used to supply VREF. |
CP1 | 1 | IO | Charge pump flying capacitor | Connect a 0.01-μF 50-V capacitor between CP1 and CP2. |
CP2 | 2 | IO | Charge pump flying capacitor | |
VCP | 3 | IO | High-side gate drive voltage | Connect a 0.1-μF 16-V ceramic capacitor and a 1-MΩ to VM. |
CONTROL | ||||
AENBL | 21 | I | Bridge A enable | Logic high to enable bridge A |
APHASE | 20 | I | Bridge A phase (direction) | Logic high sets AOUT1 high, AOUT2 low |
AI0 | 24 | I | Bridge A current set | Sets bridge A current: 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0 |
AI1 | 25 | I | ||
BENBL | 22 | I | Bridge B enable | Logic high to enable bridge B |
BPHASE | 23 | I | Bridge B phase (direction) | Logic high sets BOUT1 high, BOUT2 low |
BI0 | 26 | I | Bridge B current set | Sets bridge B current: 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0 |
BI1 | 27 | I | ||
DECAY | 19 | I | Decay (brake) mode | Low = brake (slow decay), high = coast (fast decay) |
nRESET | 16 | I | Reset input | Active-low reset input initializes internal logic and disables the H-bridge outputs |
nSLEEP | 17 | I | Sleep mode input | Logic high to enable device, logic low to enter low-power sleep mode |
AVREF | 12 | I | Bridge A current set reference input | Reference voltage for winding current set. Can be driven individually with an external DAC for microstepping, or tied to a reference (e.g., V3P3OUT). |
BVREF | 13 | I | Bridge B current set reference input | |
STATUS | ||||
nFAULT | 18 | OD | Fault | Logic low when in fault condition (overtemp, overcurrent) |
OUTPUT | ||||
ISENA | 6 | IO | Bridge A ground / Isense | Connect to current sense resistor for bridge A |
ISENB | 9 | IO | Bridge B ground / Isense | Connect to current sense resistor for bridge B |
AOUT1 | 5 | O | Bridge A output 1 | Connect to motor winding A |
AOUT2 | 7 | O | Bridge A output 2 | |
BOUT1 | 10 | O | Bridge B output 1 | Connect to motor winding B |
BOUT2 | 8 | O | Bridge B output 2 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Power supply voltage range | VMx | –0.3 | 47 | V |
Power supply ramp rate | VMx | 1 | V/µs | |
Digital pin voltage range | –0.5 | 7 | V | |
Input voltage | VREF | –0.3 | 4 | V |
ISENSEx pin voltage(2) | –0.8 | 0.8 | V | |
Peak motor drive output current, t < 1 μS | Internally limited | A | ||
Continuous motor drive output current(3) | 0 | 2.5 | A | |
Continuous total power dissipation | See Thermal Information | |||
Operating virtual junction temperature range, TJ | –40 | 150 | °C | |
Operating ambient temperature range, TA | –40 | 85 | °C | |
Storage temperature, TSTG | –60 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VM | Motor power supply voltage range(1) | 8 | 45 | V | |
VREF | VREF input voltage(2) | 1 | 3.5 | V | |
IV3P3 | V3P3OUT load current | 0 | 1 | mA | |
fPWM | Externally applied PWM frequency | 0 | 100 | kHz |
THERMAL METRIC(1) | DRV8814 | UNIT | |
---|---|---|---|
PWP (HTSSOP) | |||
28 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 31.6 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 15.9 | °C/W |
RθJB | Junction-to-board thermal resistance | 5.6 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.2 | °C/W |
ψJB | Junction-to-board characterization parameter | 5.5 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.4 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER SUPPLIES | ||||||
IVM | VM operating supply current | VM = 24 V, fPWM 50 kHz | 5 | 8 | mA | |
IVMQ | VM sleep mode supply current | VM = 24 V | 10 | 20 | μA | |
VUVLO | VM undervoltage lockout voltage | VM rising | 7.8 | 8.2 | V | |
V3P3OUT REGULATOR | ||||||
V3P3 | V3P3OUT voltage | IOUT = 0 to 1 mA | 3.2 | 3.3 | 3.4 | V |
LOGIC-LEVEL INPUTS | ||||||
VIL | Input low voltage | 0.6 | 0.7 | V | ||
VIH | Input high voltage | 2 | 5.25 | V | ||
VHYS | Input hysteresis | 0.3 | 0.45 | 0.6 | V | |
IIL | Input low current | VIN = 0 | –20 | 20 | μA | |
IIH | Input high current | VIN = 3.3 V | 33 | 100 | μA | |
nFAULT OUTPUT (OPEN-DRAIN OUTPUT) | ||||||
VOL | Output low voltage | IO = 5 mA | 0.5 | V | ||
IOH | Output high leakage current | VO = 3.3 V | 1 | μA | ||
DECAY INPUT | ||||||
VIL | Input low threshold voltage | For slow decay (brake) mode | 0 | 0.8 | V | |
VIH | Input high threshold voltage | For fast decay (coast) mode | 2 | V | ||
IIN | Input current | VIN = 0 V to 3.3 V | ±40 | μA | ||
H-BRIDGE FETS | ||||||
RDS(ON) | HS FET on resistance | VM = 24 V, IO = 1 A, TJ = 25°C | 0.2 | Ω | ||
VM = 24 V, IO = 1 A, TJ = 85°C | 0.25 | 0.32 | ||||
RDS(ON) | LS FET on resistance | VM = 24 V, IO = 1 A, TJ = 25°C | 0.2 | Ω | ||
VM = 24 V, IO = 1 A, TJ = 85°C | 0.25 | 0.32 | ||||
IOFF | Off-state leakage current | –20 | 20 | μA | ||
MOTOR DRIVER | ||||||
fPWM | Internal current control PWM frequency | 50 | kHz | |||
tBLANK | Current sense blanking time | 3.75 | μs | |||
tR | Rise time | 50 | 300 | ns | ||
tF | Fall time | 50 | 300 | ns | ||
PROTECTION CIRCUITS | ||||||
IOCP | Overcurrent protection trip level | 3 | A | |||
tTSD | Thermal shutdown temperature | Die temperature | 150 | 160 | 180 | °C |
CURRENT CONTROL | ||||||
IREF | VREF input current | VREF = 3.3 V | –3 | 3 | μA | |
VTRIP | xISENSE trip voltage | xVREF = 3.3 V, 100% current setting | 635 | 660 | 685 | mV |
xVREF = 3.3 V, 71% current setting | 445 | 469 | 492 | |||
xVREF = 3.3 V, 38% current setting | 225 | 251 | 276 | |||
AISENSE | Current sense amplifier gain | Reference only | 5 | V/V |
The DRV8814 is an integrated motor driver solution for two brushed DC motors. The device integrates two NMOS H-bridges, current sense, regulation circuitry, and detailed fault detection. The DRV8814 can be powered with a supply voltage between 8 V and 45 V and is capable of providing an output current up to 2.5 A full-scale.
A PHASE/ENBL interface allows for simple interfacing to the controller circuit. The winding current control allows the external controller to adjust the regulated current that is provided to the motor. The current regulation is highly configurable, with two decay modes of operation. Fast and slow decay can be selected depending on the application requirements.
A low-power sleep mode is included which allows the system to save power when not driving the motor.
The DRV8814 contains two H-bridge motor drivers with current-control PWM circuitry. A block diagram of the motor control circuitry is shown in Figure 5.
NOTE
There are multiple VM pins. All VM pins must be connected together to the motor supply voltage.
The xPHASE input pins control the direction of current flow through each H-bridge, and hence the direction of rotation of a DC motor. The xENBL input pins enable the H-bridge outputs when active high, and can also be used for PWM speed control of the motor. Note that the state of the DECAY pin selects the behavior of the bridge when xENBL = 0, allowing the selection of slow decay (brake) or fast decay (coast). Table 1 shows the logic.
DECAY | xENBL | xPHASE | xOUT1 | xOUT2 |
---|---|---|---|---|
0 | 0 | X | L | L |
1 | 0 | X | Z | Z |
X | 1 | 1 | H | L |
X | 1 | 0 | L | H |
The maximum current through the motor winding is regulated by a fixed-frequency PWM current regulation, or current chopping. When the H-bridge is enabled, current rises through the winding at a rate dependent on the DC voltage and inductance of the winding. Once the current hits the current chopping threshold, the bridge disables the current until the beginning of the next PWM cycle.
For DC motors, current regulation is used to limit the start-up and stall current of the motor. Speed control is typically performed by providing an external PWM signal to the ENBLx input pins.
If the current regulation feature is not needed, it can be disabled by connecting the xISENSE pins directly to ground, and connecting the xVREF pins to V3P3.
The PWM chopping current is set by a comparator which compares the voltage across a current sense resistor connected to the xISEN pins, multiplied by a factor of 5, with a reference voltage. The reference voltage is input from the xVREF pins, and is scaled by a 2-bit DAC that allows current settings of 100%, 71%, 38% of full-scale, plus zero.
The full-scale (100%) chopping current is calculated in Equation 1.
Example:
If a 0.25-Ω sense resistor is used and the VREFx pin is 2.5 V, the full-scale (100%) chopping current will be 2.5 V / (5 x 0.25 Ω) = 2 A.
Two input pins per H-bridge (xI1 and xI0) are used to scale the current in each bridge as a percentage of the full-scale current set by the VREF input pin and sense resistance. The function of the pins is shown in Table 2.
xI1 | xI0 | RELATIVE CURRENT (% FULL-SCALE CHOPPING CURRENT) |
---|---|---|
1 | 1 | 0% (Bridge disabled) |
1 | 0 | 38% |
0 | 1 | 71% |
0 | 0 | 100% |
NOTE
When both xI bits are 1, the H-bridge is disabled and no current flows.
Example:
If a 0.25-Ω sense resistor is used and the VREF pin is 2.5 V, the chopping current will be 2 A at the 100% setting (xI1, xI0 = 00). At the 71% setting (xI1, xI0 = 01) the current will be 2 A x 0.71 = 1.42 A, and at the 38% setting (xI1, xI0 = 10) the current will be 2 A x 0.38 = 0.76 A. If (xI1, xI0 = 11) the bridge will be disabled and no current will flow.
During PWM current chopping, the H-bridge is enabled to drive current through the motor winding until the PWM current chopping threshold is reached. This is shown in Figure 6 as case 1. The current flow direction shown indicates the state when the xENBL pin is high.
Once the chopping current threshold is reached, the H-bridge can operate in two different states, fast decay or slow decay.
In fast decay mode, once the PWM chopping current level has been reached, the H-bridge reverses state to allow winding current to flow in a reverse direction. As the winding current approaches zero, the bridge is disabled to prevent any reverse current flow. Fast decay mode is shown in Figure 6 as case 2.
In slow decay mode, winding current is re-circulated by enabling both of the low-side FETs in the bridge. This is shown in Figure 6 as case 3.
The DRV8814 supports fast decay and slow decay mode. Slow or fast decay mode is selected by the state of the DECAY pin - logic low selects slow decay, and logic high sets fast decay mode. Note that the DECAY pin sets the decay mode for both H-bridges.
DECAY mode also affects the operation of the bridge when it is disabled (by taking the ENBL pin inactive). This applies if the ENABLE input is being used for PWM speed control of the motor, or if it is simply being used to start and stop motor rotation.
If the DECAY pin is high (fast decay), when the bridge is disabled fast decay mode will be entered until the current through the bridge reaches zero. Once the current is at zero, the bridge is disabled to prevent the motor from reversing direction. This allows the motor to coast to a stop.
If the DECAY pin is low (slow decay), both low-side FETs will be turned on when ENBL is made inactive. This essentially shorts out the back EMF of the motor, causing the motor to brake, and stop quickly. The low-side FETs will stay in the ON state even after the current reaches zero.
After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a fixed period of time before enabling the current sense circuitry. This blanking time is fixed at 3.75 μs. Note that the blanking time also sets the minimum on time of the PWM.
The nRESET pin, when driven active low, resets the internal logic. It also disables the H-bridge drivers. All inputs are ignored while nRESET is active.
Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridges are disabled, the gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In this state all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time (approximately 1 ms) needs to pass before the motor driver becomes fully operational.
The DRV8814 is fully protected against undervoltage, overcurrent and overtemperature events.
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled and the nFAULT pin will be driven low. The device will remain disabled until either nRESET pin is applied, or VM is removed and re-applied.
Overcurrent conditions on both high and low side devices; i.e., a short to ground, supply, or across the motor winding will all result in an overcurrent shutdown. Note that overcurrent protection does not use the current sense circuitry used for PWM current control, and is independent of the ISENSEresistor value or VREF voltage.
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled and the nFAULT pin will be driven low. Once the die temperature has fallen to a safe level operation will automatically resume.
If at any time the voltage on the VM pins falls below the undervoltage lockout threshold voltage, all circuitry in the device will be disabled and internal logic will be reset. Operation will resume when VMrises above the UVLO threshold.