JAJSDF5A June 2017 – April 2020 ADC12DJ3200
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | NCO_SYNC_ILA | NCO_SYNC_NEXT | |||||
R/W-0000 00 | R/W-1 | R/W-0 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-2 | RESERVED | R/W | 0000 00 | RESERVED |
1 | NCO_SYNC_ILA | R/W | 0 | When this bit is set, the NCO phase is initialized by the LMFC edge that starts the ILA sequence (default). |
0 | NCO_SYNC_NEXT | R/W | 0 | After writing a 0 and then a 1 to this bit, the next SYSREF rising edge initializes the NCO phase. When the NCO phase is initialized by SYSREF, the NCO does not reinitialize on future SYSREF edges unless a 0 and a 1 is written to this bit again.
Follow these steps to align the NCO in multiple parts:
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