4 改訂履歴
Changes from * Revision (June 2017) to A Revision
- Changed Pin Functions table listed in alphanumeric order by pin name.Go
- Deleted reference to footnote below the Recommended Operating Conditions table and moved the information to the Power-Down Mode section.Go
- Deleted note underneath the Recommended Operating Conditions table regarding reliable serializer operation. The information has moved to the Power-Down Modes section.Go
- Changed Electrical Characteristics - AC Specifications table to include only the Dual-Channel Mode specifications and renamed the table to Electrical Characteristics: AC Specifications (Dual-Channel Mode). Single-Channel Mode specifications have been split into a separate table for ease of reading. Go
- Added Electrical Characteristics: AC Specifications (Single-Channel Mode) table to make the specification tables easier to read.Go
- Changed figure order in Typical Characteristics sectionGo
- Added FG calibration to conditions of ENOB vs Input Frequency figureGo
- Changed title of HD2, HD3, THD vs Input Frequency figureGo
- Added fCLK = 3200 MHz to conditions of SNR, SINAD, SFDR vs Temperature figureGo
- Added fCLK = 3200 MHz to conditions of HD2, HD3, THD vs Temperature figureGo
- Changed title of ENOB vs Temperature and Calibration Type figure Go
- Added fCLK = 3200 MHz to conditions of ENOB vs Temperature and Calibration Type figureGo
- Added fCLK = 3200 MHz to conditions of SNR, SINAD, SFDR vs Supply Voltage figureGo
- Added fCLK = 3200 MHz to conditions of ENOB vs Supply Voltage figureGo
- Added fCLK = 3200 MHz to conditions of HD2, HD3, THD vs Supply Voltage figureGo
- Added fCLK = 3200 MHz to Supply Current vs Temperature figureGo
- Added fCLK = 3200 MHz to Power Consumption vs Temperature figureGo
- Changed JMODE2 to JMODE0 in Background Calibration Core Transition (AC Signal) figureGo
- Changed curve data for Background Calibration Core Transition (AC Signal), Background Calibration Core Transition (AC Signal Zoomed), Background Calibration Core Transition (DC Signal), and Background Calibration Core Transition (DC Signal Zoomed) figuresGo
- Changed JMODE2 to JMODE0 in Background Calibration Core Transition (AC Signal Zoomed) figure Go
- Changed product description in Overview section Go
- Added Device Comparison section.Go
- Changed location of Analog Reference Voltage section. Go
- Changed location of Temperature Monitoring Diode section. Go
- Added requirement for at least 3 rising edges of SYSREF before SYSREF_POS output is valid.Go
- Changed note in Basic NCO Frequency Setting Mode sectionGo
- Added sentence describing Common NCO_RDIV Values (For 10-kHz Frequency Steps) tableGo
- Added clarification of NCO synchronization using DC-coupled SYSREF.Go
- Added clarification of NCO synchronization using AC-coupled SYSREF.Go
- Changed note in Power-Down Modes section to caution note explaining reliable serializer operation instead of the information being presented under the Recommended Operating Conditions table.Go
- Changed the Low-Power Background Calibration (LPBG) Mode section to provide additional detail of how to operate the device in low-power background calibration mode.Go
- Added clarity about offset calibration when both CAL_OS and CAL_BG are enabled. Go
- Changed Trimming section to limit trimming to foreground (FG) calibration mode only to better reflect customer use cases and simplify the explanation..Go
- Changed additional clarity to Offset Filtering section to explain the frequency domain impact of the feature.Go
- Changed third sentence of SDI section to include and multi-byte registers are always in little-endian format (least significant byte stored at the lowest address)Go
- Added ADC12DJ3200 Access Type Codes tableGo
- Changed description of bit 0 in DEVCLK Timing Adjust Ramp Control Register sectionGo
- Added Application Information section discussion Go
- Added Reconfigurable Dual-Channel 2.5-GSPS or Single-Channel 5.0-Gsps Oscilloscope sectionGo
- Changed Top Layer Routing: Analog Inputs, CLK and SYSREF, DA0-3, DB0-3 to Bottom Layer Routing: Additional CLK Routing, DA4-7, DB4-7 figures Go