The device requires two different power-supply voltages. 1.9V DC is required for the VA19, VPLL19 and VREFO power buses and 1.1V DC is required for the VA11 and VD11 power buses. VTRIG can be set to either 1.1V or 1.9V and the TRIGOUT± common mode voltage shifts accordingly.

The power-supply voltages must be low noise and provide the needed current to achieve rated device performance. Certain supplies should be isolated from each other to prevent noise coupling into sensitive supplies. Isolation is best performed using separate regulators for each supply, but this is often not possible due to size and cost constraints. At a minimum a PI-type power supply filtering scheme should be used which includes a low-DC resistance ferrite bead (FB) with low-inductance decoupling capacitors on each side of the ferrite bead. These are demonstrated in the example power supply architectures drawings in Figure 7-3 and Figure 7-4.

There are two recommended power supply architectures:

1. Step down using high-efficiency switching converters, followed by a second stage of regulation to provide switching noise reduction and improved voltage accuracy as shown in Figure 7-3.
2. Directly step down the final ADC supply voltage using high-efficiency switching converters as shown in Figure 7-4. This approach provides the best efficiency, but care must be taken to minimize the switching noise preventing degraded ADC performance. In general, operate the DC/DC switching regulators in fixed-frequency mode at a high switching frequency to allow design of better power supply filtering networks and reduce low frequency noise that may not be able to be filtered.

The WEBENCH® Power Designer can be used to select and design the individual power supply elements as needed.

Recommended switching regulators include the TPS62290-Q1, TPS62812-Q1, TPS62065-Q1, TPS65268-Q1, and similar devices.

Recommended Low Drop-Out (LDO) linear regulators include the TPS74801-Q1, TPS7A88-Q1, TPS7A52-Q1 and similar devices.

For the switcher only approach, the ripple filter must be designed to provide sufficient filtering at the switching frequency of the DC-DC converter and harmonics of the switching frequency. Make a note of the switching frequency reported from WEBENCH® and design the EMI filter and capacitor combination to have the filter cutoff frequency set as needed. Each application has different tolerance for noise on the supply voltage and the impact to performance so strict ripple requirements are not provided. In general, the supply voltage must stay within the recommended operating conditions limits during all ripple and transient events. Any supply filtering must account for potential current transients, specifically when using low-power background calibration (see Low-Power Background Calibration (LPBG) Mode).

FB = ferrite bead filter.

Figure 7-3 LDO Linear Regulator Approach Example

FB = ferrite bead filter.

Figure 7-4 Switcher-Only Approach Example